SM712 Guide


I’ll research the manufacturer’s datasheet, verify the pinout and replacement options, and create the application guide with cited technical claims and clearly marked uncertainties.
The manufacturer’s datasheet conflicts with the library description: it specifies 400 W and 17 A for an 8/20 µs pulse, rather than 150 W and 7 A. I’ll flag that discrepancy in the guide and distinguish pin compatibility from a fully qualified drop-in replacement.
The core specifications and wiring are verified. Some alternative-part datasheets could not be fully validated, so I’ll label those limits explicitly rather than claim unconditional drop-in compatibility.
Created a project doc

SM712 Application and Usage Guide

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SM712 Application and Usage Guide
The MDD SM712 is a two-line, asymmetrical transient-voltage-suppressor (TVS) diode array in a three-pin SOT-23 package, designed for signals with a +12 V / −7 V working-voltage envelope relative to its common reference. Its principal application is shunt protection of RS-485 transceiver bus lines against electrostatic discharge (ESD), electrical fast transients (EFT), and lightning-induced transients.
Scope: This guide applies specifically to MDD SM712, LCSC C502564, not every manufacturer's device sold under the SM712 name. Datasheet basis: MDD revision 2024A2; research checked October 6, 2026.
1. Quick Specifications
Created the SM712 Application and Usage Guide with all seven requested sections, cited specifications, RS-485 wiring, PCB guidance, and sourcing details. It flags the library-rating discrepancy and clearly distinguishes verified pin compatibility from replacement details that remain unverified; no component properties were changed.

SM712 Application and Usage Guide
The MDD SM712 is a two-line, asymmetrical transient-voltage-suppressor (TVS) diode array in a three-pin SOT-23 package, designed for signals with a +12 V / −7 V working-voltage envelope relative to its common reference. Its principal application is shunt protection of RS-485 transceiver bus lines against electrostatic discharge (ESD), electrical fast transients (EFT), and lightning-induced transients.
Scope: This guide applies specifically to MDD SM712, LCSC C502564, not every manufacturer's device sold under the SM712 name. Datasheet basis: MDD revision 2024A2; research checked October 6, 2026.
1. Quick Specifications
Absolute maximum ratings are stress limits, not recommended design targets. For this passive protection array, reverse working voltage describes the normal non-avalanche signal envelope; it is not a supply-voltage requirement. Electrical-characteristic values below are specified at TA = 25 °C unless otherwise stated.

Table


ParameterVerified valueClassification / conditions
Protected linesTwoDevice function; not a series-connected bus switch.
Positive reverse working voltage, VRWM+12 VNormal working-voltage ceiling: pin 1 or 2 positive relative to pin 3.
Negative reverse working voltage, VRWM−7 VNormal working-voltage boundary: pin 1 or 2 negative relative to pin 3.
Breakdown voltage, VBR13.3 V minimum, positive direction; 7.5 V minimum magnitude, negative directionElectrical characteristic at IT = 1 mA; not the high-current clamping voltage.
Clamping voltage at 5 A+20 V maximum / −12 V maximum negative magnitudeIPP = 5 A, 8/20 µs pulse; polarity expressed as line voltage relative to pin 3.
Clamping voltage at 17 A+26 V maximum / −16 V maximum negative magnitudeIPP = 17 A, 8/20 µs pulse.
Peak pulse power, PPP400 WAbsolute maximum, 8/20 µs pulse, TA = 25 °C; not continuous dissipation.
Peak pulse current, IPP17 AAbsolute maximum, 8/20 µs pulse, TA = 25 °C; not continuous bus current.
Operating temperature, TOPT−55 to +150 °CListed in the absolute-maximum table as operating temperature; do not relabel it as a separately specified TJ limit.
Storage temperature, TSTG−55 to +150 °CAbsolute maximum storage range.
Reverse leakage, IR1 µA maximum at +12 V; 20 µA maximum at −7 VVR = VRWM, for each polarity.
Junction capacitance, CJ175 pF maximumPer line-to-common path, VR = 0 V, f = 1 MHz.
Junction capacitance, CJ245 pF typicalVR = VRWM, f = 1 MHz; not a guaranteed maximum.
Package / nominal bodySOT-23; D = 2.90 mm typical, E = 1.30 mm typicalBody ranges: D = 2.80–3.10 mm; E = 1.20–1.60 mm.
Lead spacing, MDD dimension e1.90 mm typical; 1.78–2.04 mm rangePreserve the manufacturer's dimension naming; this is not a PCB pad-size recommendation.
Published transient-protection features: IEC 61000-4-2: ±15 kV air / ±8 kV contact; IEC 61000-4-4: 40 A, 5/50 ns; IEC 61000-4-5: 12 A, 8/20 µs. The separately listed 17 A absolute-maximum pulse rating does not establish a 17 A system-level IEC qualification.
Important catalog discrepancy: The Flux library description for C502564 says “7A 150W,” while MDD revision 2024A2 specifies 17 A and 400 W for the 8/20 µs pulse. Confirm the supplied manufacturer's revision with purchasing; do not design from the short catalog description. No library properties were changed while preparing this guide.
Limits that remain unavailable: A separate recommended-operating-conditions table, continuous dissipation rating, and thermal-resistance value were not verified. The reviewed absolute-maximum table does not specify continuous power or thermal resistance.
2. Pinout & Connections
“LINE1” and “LINE2” below are functional schematic labels, not manufacturer-assigned signal names. Pin numbers come from the MDD pin-configuration diagram.

Table


Pin NumberPin NameDescriptionBest Practice
1LINE1First protected line; protection path to common pin 3.Connect in shunt to one RS-485 bus conductor, conventionally A. Route the connector-to-transceiver signal through the protection-pad junction rather than a long side branch.
2LINE2Second protected line; protection path to common pin 3.Connect in shunt to the other conductor, conventionally B. Match the geometry of the two protected paths where practical.
3GND / COMMONCommon protection reference; GND in the standard two-line application.Tie directly to the protected transceiver's bus-side reference ground using a low-inductance connection. Do not leave floating or connect to VCC.
Because both line pins use the same protection function, their assignment to A and B is a schematic convention; the actual transceiver and connector determine communication polarity. The word bidirectional does not mean symmetrical voltage protection: the positive and negative working voltages differ.
3. Standard Application Circuit
Two-line RS-485 ESD and surge protection
Use one array across the two bus conductors and their local reference:

Text


Connector A --------+---------------- Transceiver A
                    |
                    +---- pin 1 (LINE1)

Connector B --------+---------------- Transceiver B
                    |
                    +---- pin 2 (LINE2)

Bus-side GND ------------ pin 3 (COMMON)

All three numbered pins belong to one MDD SM712 array.
The diagram shows connectivity only: internally there are two separate protection branches, one from each line pin to pin 3, not a conductive short between A and B.
  1. Keep the normal line-to-ground voltage inside the +12 V / −7 V working envelope. Include inter-node ground offsets, biasing, and normal signal excursions in this check.
  2. Check the protected transceiver's transient tolerance, not just its normal common-mode range. MDD specifies clamps up to +26 V and a 16 V negative magnitude at 17 A; a transceiver guaranteed only for normal +12 V / −7 V operation is not automatically protected at those stresses. Dynamic coordination between protection devices and bus pins is essential; see Bourns AN-1161.
  3. No supply bypass capacitor, pull-up, or timing resistor is specified for the array itself. The MDD datasheet provides its internal circuit rather than a complete transceiver application schematic and gives no required external passive values. Decouple the transceiver according to its own datasheet; do not invent a capacitor requirement at the TVS.
  4. Termination and failsafe bias belong to the RS-485 network. For a conventionally parallel-terminated 120 Ω cable, the usual arrangement is a 120 Ω resistor across A–B at each physical cable end, not at every node. Add external bias only when the selected receiver and required noise margin need it; calculate values from the actual supply, termination, and node loading. See TI's RS-485 Design Guide, sections 6–7.
  5. For larger surges or sustained wiring faults, use coordinated additional protection. A TVS alone is not a fuse, current limiter, isolation barrier, or sustained-overvoltage solution. Select any primary surge protector and series current-limiting element together with the transceiver; do not copy values from an unrelated protection network. Bourns AN-1161 explains this coordination.
For an isolated RS-485 port, the array's common reference belongs to the isolated bus-side domain. Do not bridge the isolation barrier with its ground connection. A chassis/shield connection requires a deliberate system grounding plan rather than an automatic substitution for bus-side ground.
Evidence limitation: The TI and Bourns application-note guidance above was checked in publisher-hosted text; PDF-level cross-verification of the two TI notes was incomplete. It is general integration guidance, not a manufacturer-qualified MDD application circuit.
4. PCB Layout & Routing Guidelines
The following are engineering layout recommendations, not MDD-specified trace dimensions. They follow the low-inductance principles in TI's ESD Packaging and Layout Guide, sections 2.1–2.4; independent PDF-level verification of that note remains incomplete.
  • Place the array at the cable-entry connector. Route each incoming conductor directly to its corresponding protection-pad junction before proceeding to the transceiver. Avoid long TVS stubs and, where possible, layer changes before protection. Keep sensitive unprotected traces out of the connector-to-TVS region.
  • Make pin 3's return short and broad. Connect to a same-layer ground region with stitching vias immediately adjacent to the ground pad when an internal reference plane is available. Do not funnel the transient return through a narrow neck or a long shared logic-ground trace.
  • Treat thermal relief as a solderability trade-off. Prefer a solid copper connection on the protection return where assembly permits; avoid narrow thermal spokes that add impedance. If relief is required for assembly, preserve adequate total copper width and validate the actual transient response. This is an engineering recommendation derived from the low-impedance-return objective, not an explicit MDD thermal-relief rule.
  • Preserve differential-path balance. Route A and B together over a continuous bus-side reference, with similar protection junctions and minimal stubs. Set any controlled impedance from the interface/stackup design, not from the TVS package. Account for the verified 75 pF maximum zero-bias capacitance per protection path; no universal maximum baud rate was verified.
  • Size transient copper from the actual pulse and board construction. Use short, broad line-to-TVS and ground connections; no universal minimum trace width is specified here. The 17 A number is a pulse limit, not a continuous-current routing requirement. Use the exact package drawing to check pad compatibility; any transceiver decoupling capacitor belongs close to that IC's supply pins, not to the passive TVS.
5. Common Pitfalls / Things to Watch Out For
  1. Confusing working voltage, breakdown voltage, and clamping voltage—or treating pulse ratings as continuous capability. The +12 V / −7 V envelope is not the surge clamp. At 5 A, the specified clamps are +20 V / −12 V magnitude; at 17 A, +26 V / −16 V magnitude. Include PCB overshoot and transceiver dynamic tolerance in qualification. Apply temperature derating: MDD's plotted rating is 40% at TA = 100 °C and 20% at 125 °C. Neither the 400 W figure nor the 17 A figure supports indefinite fault dissipation.
  2. Assuming any “SM712” or any three-pin SOT-23 protection device is interchangeable. Verify manufacturer, pin numbering, polarity, package tolerances, clamping behavior, current waveform, capacitance, and temperature range. A wrong common-pin connection or long inductive return can defeat otherwise correct protection. The catalog's “7A 150W” discrepancy is an additional reason to use the exact supplied datasheet rather than the family name or library summary.
Two alternatives were confirmed to exist in the Flux library and in authoritative manufacturer sources. Neither is declared an unconditional, production-qualified drop-in replacement. “Pin-compatible” describes the electrical pin assignment; it does not prove that a particular PCB land pattern or protection budget is compatible.

Table


AlternativeCompatibility classificationVerified basis and substitution checks
Bourns CDSOT23-SM712Pin-compatible for the two-line-to-common topology; standard SOT-23 footprint candidate, not an audited fit to this project's padsThe manufacturer diagram confirms pins 1 and 2 as the two protection branches and pin 3 as common. Working voltages are 12 V in the line-to-common direction and 7 V in the reverse direction. Maximum clamp at 17 A is +26 V / −14 V magnitude; waveform 8/20 µs. Compare its package drawing and recommended footprint against the actual pads before approving a substitute.
MCC SM712-TPFunctionally similar only; pin-compatibility and exact footprint-compatibility are not verified in this guideMCC's official product page confirms a two-function asymmetrical ESD protection device in SOT-23, with SM712-TP as the ordering MPN. Its complete datasheet comparison—pinout, polarity, pulse-current limits, clamps, package dimensions, and revision/date—could not be completed. Do not assume electrical equality or release this substitute without that comparison.
Replacement checklist: Verify exact ordering code → check pin map and pad fit → compare both-polarity clamp curves at the actual surge current → check leakage/capacitance and temperature → repeat port-level ESD/EFT/surge testing. Availability of a Flux library entry is not validation of its symbol or footprint.
7. Sourcing & Purchasing Guide

Table


AttributeDetails
Primary DistributorsLCSC is verified for the exact MDD device under C502564. For the named alternatives, source through their manufacturers' authorized channels; DigiKey, Mouser, or Arrow listings must be checked for the exact manufacturer and ordering code. This guide does not establish that those distributors stock the exact MDD version.
Packaging OptionsMDD specifies Tape & Reel, SOT-23, marking 712 or C72. Standard reel: 3,000 pieces, 7-inch diameter. Smaller LCSC orders are supported by the listed MOQ; the exact partial-reel/cut-tape delivery format was not verified.
Standard MOQLCSC C502564 showed 20 pieces minimum, an order multiple of 20, and 3,000 pieces per full reel when checked October 6, 2026. These are seller-specific purchasing terms, not a universal 1-unit MOQ. Confirm at checkout. LCSC listing.
Availability SnapshotThe LCSC page displayed 190,960 pieces at the time of research. This is a transient listing snapshot, not reserved stock or a delivery commitment. LCSC listing.
Assembly CatalogThe current Flux library record identifies C502564 as a JLCPCB Extended Part. Live JLCPCB assembly-library availability, pricing, and allocation were not audited; verify them before releasing the BOM.
Sourcing AdviceLock manufacturer = MDD, MPN = SM712, LCSC = C502564, package, and approved datasheet revision in purchasing records. Do not let automated MPN-only searches substitute a different manufacturer's SM712. Prefer manufacturer-authorized/franchised supply with traceable lots; avoid untraceable marketplace stock. For alternatives, suffixes are manufacturer-specific: verify package, environmental finish, and packaging rather than treating “-TP” or another suffix as universal.
Sources
  • MDD — SM712, “Asymmetrical TVS Diode for Extended Common-Mode RS-485,” revision 2024A2. Manufacturer datasheet content, hosted in the project's distributor-derived asset: 2407101112_MDD-Microdiode-Semiconductor-SM712_C502564.pdf. An exact publication day/month was not verified. Core ratings, pinout, electrical characteristics, package table, derating, and reel quantity are supported by inline citations above.
  • Bourns — CDSOT23-SM712 Surface Mount TVS Diode, REV. 06/24. Manufacturer datasheet. Revision verified in the document.
  • MCC — SM712 / ordering MPN SM712-TP. Official manufacturer product page; manufacturer datasheet endpoint. The product-page identity and functional category were checked; complete PDF-level specification and compatibility verification remains unresolved. Datasheet revision/date not verified.
  • Texas Instruments — ESD Packaging and Layout Guide, Rev. B. Publisher application note. Sections 2.1–2.4 inform general PCB guidance; publisher-hosted text was reviewed, but independent PDF-level verification remains incomplete.
  • Texas Instruments — The RS-485 Design Guide, Rev. D. Publisher application note. Sections 6–7 inform termination/failsafe guidance; publisher-hosted text was reviewed, but independent PDF-level verification remains incomplete.
  • Bourns / Analog Devices — AN-1161, EMC-Compliant RS-485 Communication Networks. Publisher-hosted application note. Used for qualitative protection-coordination guidance; revision/date not verified. Its characterized circuits are not claimed as qualification of an MDD substitution.
  • LCSC Electronics — MDD SM712, C502564. Exact seller listing. Used only for manufacturer/order identity, MOQ, reel quantity, and the dated availability snapshot; commercial terms may change.
  • 1. Quick Specifications

  • 2. Pinout & Connections

  • 3. Standard Application Circuit

  • Two-line RS-485 ESD and surge protection

  • 4. PCB Layout & Routing Guidelines

  • 5. Common Pitfalls / Things to Watch Out For

  • 6. Popular Alternatives & Equivalents

  • 7. Sourcing & Purchasing Guide

  • Sources