Fixing nRF52840 Footprint

I can’t directly modify footprint geometry for you, but here’s exactly what Flux documentation says for configuring pads and thermal relief. Apply these to EP:
Quoted from the Flux docs "Configuring a pad is easy with the toolbar. When a pad is selected on PCB, a toolbar shows up above it on the canvas. From there, you can change its position, size, pad type, pad shape, and hole size.
Configure a Pad using Layout Rules
If you need to get in deeper, you can use layout rules in the inspector. To learn how to add rules to objects, please refer to our documentation on Layout Rules Reference.
Pad Type
Modifies the type of pad to one of the following:
  • SMD – a surface mount pad with no drill hole.
  • HOLE – a drill hole with no copper.
  • STD – a through-hole pad. (STD stands for 'Standard'.)
  • CONN – a connector pad with no drill hole, often used at the edges of a board."
"Thermal Relief
Defines how a pad connects to a fill. The Relief Connect option separates the pad from the fill and connects them with conductors. The distance of the separation is defined by the Keep Out rule. Useful when soldering a component to a pad. The Direct Connect option is essentially 'no thermal reliefs'. It removes the conductors and prevents Keep Outs from having an effect, allowing the pad and the fill to connect directly.
Related rules include Thermal Relief Conductors, Thermal Relief Conductor Width, and Thermal Relief Conductor Angle."
What to set on EP
  • Pad type: SMD
  • Pad shape: Square/rectangular
  • Pad size: 3.2 mm x 3.2 mm
  • Net: GND
  • Thermal connection: Relief Connect (thermal relief)
If you run into anything unclear while applying these settings, tell me what you’re seeing on the Inspector/toolbar and I’ll point you to the exact control.
The EP pad size of 4.85mm is correct per the AQFN-73 footprint spec. The overlapping copper errors between EP and signal pads D+ and P0.15 are because those signal pads are incorrectly positioned. Can you check the positions of pads D+ and P0.15 and move them to their correct positions per the nRF52840-QIAA-R datasheet?
You want me to verify and correct the locations of D and P0.15 per the nRF52840 AQFN-73 datasheet, so EP overlaps disappear.
Plan:
  1. Compare the footprint to the Nordic pin map/orientation.
  2. Calculate target coordinates from the pin pitch/origin.
  3. Move D+ and P0.15 to the correct locations.
  4. Re-run DRC and confirm no EP overlaps.
  5. Save and summarize changes.
Click Start to run this plan, or tell me what you’d like changed.
Get current pad positions
Run DRC overlap check
Pull datasheet pad map
Confirm footprint rotation

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    NRF52840-QIAA-R/NRF52840-QIAA-R.3dshapes/AQFN-73_L7.0-W7.0-H0.9-P0.50.step

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    RF Transceiver ICs NRF52840-QIAA-R AQFN-73_L7.0-W7.0-P0.50-BL-EP4.8 LCSC Part Number: C190794 JLCPCB Part Class: Extended Part Manufactured by NORDIC

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    NRF52840-QIAA-R

    C190794

    AQFN-73_L7.0-W7.0-P0.50-BL-EP4.8

    RF Transceiver ICs

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