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J10
N6
F14
P0[15]
VDD(REG)(3V3)
JTAG_TRST#
P2[7]
VDD(3V3)
P2[5]
P2[2]
F5
L2
VDD(REG)(3V3)
VDD(3V3)
D1
P3[1]
G2
P3[15]
P3
P2[10]
P1[13]
P2[13]
P3[14]
M14
VDD(3V3)
P1[8]
P10
K7
M3
P3[12]
P2[3]
P8
H14
P0[12]
P3[8]
P0[14]
P11
P0[0]
P3[11]
L7
RESET#
E1
JTAG_TCK (SWDCLK)
P4[0]
P4[4]
P3[9]
P1[5]
B4
P3[10]
L1
P0[13]
P0[7]
P1[3]
C7
N7
M6
N5
N12
P3[13]
P4[13]
P2[1]
P5[3]
P1[7]
E4
P3[0]
P4[11]
A10
P2[11]
VDD(REG)(3V3)
VDD(3V3)
K4
N8
P4[1]
L5
P4[12]
RTCX2
N4
P1[1]
P5[2]
C9
JTAG_TDI
P4[10]
K11
P0[4]
P9
J13
P0[2]
JTAG_TDO (SWO)
P3[6]
F3
P6
P2[0]
P2[9]
P4[7]
P1[14]
P0[3]
P4[8]
P1
P0[6]
P4[3]
K2
P2[12]
P2[8]
P2[6]
M9
C8
P1[15]
N10
P1[9]
M2
P3[4]
B9
L3
P2
K3
N13
P14
M4
RSTOUT#
P5[1]
P0[10]
K14
USB_D2
RTC_ALARM
P0[9]
P3[2]
P0[1]
M1
P1[6]
P1[10]
VDDA
P1[0]
JTAG_TMS (SWDIO)
K13
VDD(3V3)
P3[5]
P4[5]
E7
N3
VDD(3V3)
L14
VDD(3V3)
P4[2]
P3[7]
P4[15]
P7
P0[8]
P3[3]
P1[12]
P4[6]
RTCX1
D9
VDD(3V3)
P4[14]
P1[2]
P1[4]
K6
P5[0]
P5[4]
P4[9]
VBAT
J12
B8
P1[11]
P5
P0[11]
P0[5]
N1
P2[4]
D10

LPC1778FET180,551