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Files

Pins

Symbol

Layout

Preview

P0[0]/RD1/TXD3/SDA1
P1[9]/ENET_RXD0
VSS
P2[7]/RD2/RTS1
P0[24]/AD0[1]/I2SRX_WS
P0[6]/I2SRX_SDA/SSEL1
P0[21]/RI1/RD1
P1[17]/ENET_MDIO
VDD(3V3)
P4[29]/TX_MCLK/MAT2[1]/RXD3
P0[4]/I2SRX_CLK/RD2
P0[2]/TXD0/AD0[7]
P0[16]/RXD1/SSEL0
P0[9]/I2STX_SDA/MOSI1
P0[28]/SCL0/USB_SCL
P1[25]/MCOA1/MAT1[1]
P0[10]/TXD2/SDA2
P1[28]/MCOA2/PCAP1[0]
VDD(3V3)
P2[8]/TD2/TXD2
P0[22]/RTS1/TD1
P1[26]/MCOB1/PWM1[6]
P2[4]/PWM1[5]/DSR1
P0[3]/RXD0/AD0[6]
VDD(REG)(3V3)
P1[20]/MCI0/PWM1[2]
P1[29]/MCOB2/PCAP1[1]
P2[11]/~{EINT1}/I2STX_CLK
P3[26]/STCLK/MAT0[1]/PWM1[3]
VREFP
P2[5]/PWM1[6]/DTR1
P0[18]/DCD1/MOSI0
VSS
P0[17]/CTS1/MISO0
P0[23]/AD0[0]/I2SRX_CLK
P2[6]/PCAP1[0]/RI1
P0[8]/I2STX_WS/MISO1
P2[10]/~{EINT0}/NMI
VSS
TDO/SWO
VDDA
TCK/SWDCLK
P3[25]/MAT0[0]/PWM1[2]
VDD(3V3)
P0[20]/DTR1/SCL1
P1[24]/MCI2/PWM1[5]
P1[14]/ENET_RX_ER
P1[8]/ENET_CRS
n.c.
XTAL1
TMS/SWDIO
P0[26]/AD0[3]/AOUT
P2[2]/PWM1[3]/CTS1
P0[30]/USB_D-
VDD(3V3)
VREFN
VSS
RTCX2
P2[1]/PWM1[2]/RXD1
P0[19]/DSR1/SDA1
~{RESET}
P1[16]/ENET_MDC
VSSA
P1[1]/ENET_TXD1
VSS
RTCX1
P1[15]/ENET_REF_CLK
P0[1]/TD1/RXD3/SCL1
VDD(REG)(3V3)
P2[3]/PWM1[4]/DCD1
P1[18]/USB_UP_LED/PWM1[1]
P1[10]/ENET_RXD1
P0[15]/TXD1/SCK0
VSS
P2[13]/~{EINT3}/I2STX_SDA
P1[27]/CLKOUT/~{USB_OVRCR}
P0[29]/USB_D+
VBAT
P0[11]/RXD2/SCL2
TDI
P1[23]/MCI1/PWM1[4]
P1[21]/~{MCABORT}/PWM1[3]
P4[28]/RX_MCLK/MAT2[0]/TXD3
~{RSTOUT}
P2[0]/PWM1[1]/TXD1
P1[30]/VBUS/AD0[4]
P1[31]/SCK1/AD0[5]
P0[25]/AD0[2]/I2SRX_SDA
P1[19]/MCOA0/~{USB_PPWR}
P2[12]/~{EINT2}/I2STX_WS
RTCK
P1[22]/MCOB0/USB_PWRD
P0[7]/I2STX_CLK/SCK1
P0[27]/SDA0/USB_SDA
~{TRST}
P0[5]/I2SRX_WS/TD2
XTAL2
P1[0]/ENET_TXD0
P2[9]/USB_CONNECT/RXD2
P1[4]/ENET_TX_EN
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