I want to build a board using a rp2350a, a dual ft...

Work completed
  • Set Trace Width to 6 mil
  • Set Clearance to 6 mil
  • Set Via Drill Size to 0.4 mm
  • Configured Annular Ring, Copper-to-Hole, and Copper-to-Board-Edge clearances per manufacturer capabilities
Remaining tasks
  • Place all components with Auto-Layout
  • Auto-route all nets
  • Manually inspect and tune USB data, power, and high-speed nets
  • Run DRC and resolve any errors; confirm no airwires remain
Tasks not doable by the agent
  • Auto-Layout placement
  • Auto-routing
  • Manual routing adjustments
  • DRC review and fix
Success criteria status
  • ✅ PCB rules configured for 2-layer design
  • ❌ Component placement pending
  • ❌ Routing pending
  • ❌ DRC review pending
Next step Please initiate the Auto-Layout placement of components on the PCB outline to proceed with placement, routing, and final DRC checks.
U4
BCBUS7
REF
BDBUS3
VREGOUT
BDBUS7
BCBUS4
AGND
ACBUS6
VPHY
ACBUS2
VPLL
ACBUS5
GND
~{RESET}
BCBUS6
ACBUS7
EP
ADBUS0
EECS
BCBUS1
ADBUS2
GND
BCBUS0
VCCIO
~{PWREN}
GND
ACBUS3
BDBUS5
VCORE
BDBUS1
ADBUS1
GND
BDBUS0
ADBUS5
VCCIO
BDBUS6
VREGIN
GND
~{SUSPEND}
VCORE
TEST
ADBUS7
OSCO
ACBUS1
DM
BDBUS2
VCCIO
GND
VCCIO
EEDATA
BDBUS4
ACBUS4
ADBUS3
GND
DP
GND
BCBUS2
ACBUS0
ADBUS6
ADBUS4
OSCI
VCORE
BCBUS5
BCBUS3
EECLK
TVS1
J3
R3
Resistance
500 Ω
R4
Resistance
500 Ω
H2
R10
Resistance
500 Ω
R9
Resistance
500 Ω
J1
R1
Resistance
500 Ω
H3
J2
C3
Capacitance
Capacitance
C2
Capacitance
100nF
R6
Resistance
500 Ω
R2
Resistance
500 Ω
C5
Capacitance
Capacitance
C4
Capacitance
Capacitance
H1
C1
Capacitance
100nF
H4
R7
Resistance
500 Ω
R5
Resistance
500 Ω
R8
Resistance
500 Ω
L1
J4
U3
F1

No files yet

Documents

    Documents are markdown text files which describe project goals, capture details, or even simulation outputs.

    Assets

    FT2232HQ-REEL/FT2232HQ-REEL.3dshapes/QFN-64_L9.0-W9.0-H1.0-P0.50.step

    FT2232HQ-REEL/FT2232HQ-REEL.3dshapes/QFN-64_L9.0-W9.0-H1.0-P0.50.step

    FT2232HQ-REEL/FT2232HQ-REEL Model3D Model

    FT2232HQ-REEL/FT2232HQ-REEL.pretty/QFN-64_L9.0-W9.0-P0.50-TL-EP4.3.kicad_mod

    FT2232HQ-REEL/FT2232HQ-REEL FootprintFootprint

    FT2232HQ-REEL Symbol.svg

    FT2232HQ-REEL SymbolDefault

    FT2232HQ-REEL

    FT2232HQ-REEL thumbnail
    DRC Review Status Update

    Properties

    FTDI(飞特帝亚)

    0.4

    mm

    Standard 2 Layer

    1.19

    W

    6

    mil

    -7.06mm

    0.4 mm

    mm

    923.075mm

    1644.65mm

    6

    mil

    1637.9

    mm

    -7.06mm

    923.075mm

    0.2

    mm

    0.15

    mm

    916mm

    1644.65mm

    -6.75mm

    Diagram


    UART0 UART1 SPI USB & VIN Inputs "3.3V Regulator (≥700mA)" RP2350A MCU FT2232HQ USB-to-UART USB Connector Channel A Channel B SPI LCD Interface Oscillator Circuit Decoupling & Reset Circuit

    1637.9mm

    Diagram


    VBUS D+, D– D+, D– UART0 UART1 SPI 5V VBUS Input PTC Fuse & Protection "3.3V LDO Regulator (≥700mA)" 3.3V Rail RP2350A MCU FT2232HQ USB-to-UART USB-C Connector MCU USB D+/D– 9-pin USB Header FT2232 Channel A FT2232 Channel B ST7796 LCD SPI 12-pin UI Header TVS & CMC Oscillator Decoupling & Reset Circuit

    0.15

    mm

    916

    -6.75

    mm

    U

    FT2232HQ-REEL

    C193662

    QFN-64_L9.0-W9.0-P0.50-TL-EP4.3

    USB ICs

    Extended Part

    Pricing & Availability

    DPN

    Stock

    Qty 1

    3

    0–4K

    $4.466–$4.6097

    1

    0

    $4.3125

    1

    462

    $16.15274

    1

    2.3K

    $12.7601

    1

    0

    $5.30

    5

    35–4K

    $4.29–$8.5954

    Controls