The EVVO FS8205A is a 20 V dual N-channel enhancement-mode MOSFET with a common-drain configuration in a SOT23-6L surface-mount package. Its principal application is the back-to-back charge/discharge switch in a battery-protection circuit, with load switching and power management also listed by the manufacturer.

Scope and verification status: This guide applies to the EVVO/EVVOSEMI six-pin device described by this project's attached datasheet, not every device sold as FS8205A. The numbered pin mapping could not be verified from the accessible drawing; consequently, this is an integration guide with an explicit pinout release gate, not a fabrication-ready reference schematic. Research checked October 6, 2026. PCB recommendations below are engineering guidance, not manufacturer-prescribed trace dimensions.

Datasheet discrepancy: The General Features headline states RDS(on) <22.5 mΩ at 4.5 V and <27 mΩ at 2.5 V, whereas the Electrical Characteristics table specifies maxima of 27 mΩ and 37 mΩ respectively. For conservative preliminary calculations, use the larger tabulated maxima and obtain manufacturer clarification before a tightly margined production design. Do not silently copy the headline values into the BOM specification.

Numbered pinout is unresolved. The accessible source identifies a SOT23-6L Pin Configuration drawing, but the retrieved representation did not establish a reliable pin-number-to-terminal map. No standard SOT-23-6 pinout should be substituted by assumption.

Terminal-level integration guidance: The device has two separately controlled gates and two source-side switch terminals, with a shared drain connection. In a common-drain battery-protection circuit, one source goes to cell negative and the other to protected pack negative; the common drain is the intermediate switch node, not a ground terminal. Drive each gate relative to its own source. Do not leave a gate floating; if a general-purpose driver can be high impedance, design a gate-to-source bias resistor, but do not add an arbitrary resistor to a battery-protection IC output without checking that IC's recovery and leakage requirements. These are topology-level recommendations pending numbered pin verification.

The FS8205A is the switching element, not a battery charger or standalone protection controller. A protection IC must detect cell voltage and current faults and drive the two MOSFET gates. Fortune's DW01A application provides a concrete controller reference: OD is the discharge-control gate output, OC is the charge-control gate output, and CS is the current-sense/charger-detect input.

For an engineering implementation of that common-drain topology:

The DW01A typical application specifies R1 = 100 Ω, C1 = 0.1 µF, and R2 = 1 kΩ. R1 and C1 provide the recommended VCC ripple/disturbance filter; R2 provides latch-up/overstress protection under the charger-connection conditions described by the controller manufacturer. As layout guidance, place C1 directly between controller VCC and its cell-negative ground reference, with a short return path. These values belong to this controller example, not universal FS8205A requirements; check the selected controller revision and cell chemistry before reuse.

Loss calculation, derived from the cited resistance values: For both conducting channels, Pcond = I² × (RDS(on,1) + RDS(on,2)). At 3 A and 2.5 V gate drive, using the 25°C maximum of 37 mΩ per channel gives 9 × 0.074 = 0.666 W total and a 0.222 V path drop. At 6 A and 4.5 V gate drive, 27 mΩ per channel gives 1.944 W total, before hot-resistance increase and PCB losses. These calculations illustrate why a “6 A” catalogue rating is not a safe continuous-current guarantee for a small PCB; verify actual gate drive, hot resistance, thermal sharing and enclosure conditions.

There is no MOSFET supply pin requiring a generic bypass capacitor. Gate damping, transient clamps, flyback protection and bulk capacitance depend on the driver and load; no fixed values are claimed here. LED resistor calculations and USB CC/shield guidance are not applicable.

No drop-in replacement is verified. Numbered pin compatibility cannot be established while the target pinout remains unresolved. The following are verified functional candidates from other manufacturers, not approved substitutions.

AOS AO9926B was also investigated, but its datasheet evidence remained pending after a retry. It is deliberately excluded from the verified alternatives list; neither its compatibility nor its ratings are established here. “Popular” is not supported by sales-volume evidence; these are practical candidates rather than a popularity ranking.

For every substitution, requalify on-resistance at minimum gate drive, thermal behavior, body-diode paths, protection-controller overcurrent threshold, and fault recovery. A lower RDS(on) can change a controller's current-trip point when the switch resistance is part of the sensing method.

Identity warning: LCSC's TECH PUBLIC listing contains catalogue attributes that differ from the EVVO source, including configuration and gate-voltage data, and its prose is internally inconsistent. It is useful as evidence of a separate supplier identity, not as a source for EVVO wiring. Do not merge ratings from different manufacturers merely because their MPN text matches.

Remaining release checks: Obtain a legible EVVO top-view pinout, reconcile all six symbol pins with footprint pads, resolve the headline/table resistance discrepancy with the manufacturer, and qualify any replacement on the actual circuit. No schematic, footprint, BOM or PCB geometry was changed by writing this guide.