ESP32 LCSC Part Verification
3V3ENIO46IO45IO0RXD0TXD0GND41_1 through 41_9, which is reasonable for a split thermal pad array, but the indexed footprint data did not expose enough pad-number detail to confirm every footprint pad maps cleanly to the symbol terminals.ESP32-S3-WROOM-1-N8R8C29132013.0–3.6 V, typical 3.3 V0.5 A–40 to 65 °CPin Type: Unspecified / Terminal Type: unspecified. That should be fixed so ERC and downstream users understand power, ground, input, output, bidirectional GPIO, enable, and UART pins.IO0, IO45, IO46, and IO3 are strapping-related.RXD0 / TXD0 are also GPIO44 / GPIO43; aliases or descriptions would reduce confusion.N8R8 PSRAM variant, IO35, IO36, and IO37 should be documented as restricted / not generally available due to internal Octal SPI PSRAM usage.1–40 and EPAD 41 / 41_1–41_9.ESP32-S3-WROOM-1-N8R8.To get started, talk to Flux or create a New Document.
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