Contactor Sequencer Board Design

Thought for 3 sec

I can’t execute project edits right now because this session has no remaining execution credits.

No schematic/layout changes were made in this session. The project currently referenced is an ESP32-C3-WROOM-02-H4 component/library-style project, while your request is for a full Contactor Sequencer Board design. To proceed when credits are available, the next work should be:

Create a new board-level design/spec document for the contactor sequencer.
Select JLCPCB/LCSC-available parts:
- ESP32-family MCU/module
- 24V→5V buck and 5V→3.3V regulator or direct 24V→3.3V buck
- optocouplers for isolated ENABLE inputs
- hardware fail-safe gate/logic path independent of MCU firmware
- low-side MOSFET drivers for NEG, POS, and pre-charge relay coil
- PCB relay, 24V coil, ≥2A contacts
- 5x20mm high-breaking-capacity fuse holder/fuse
- screw terminals, SWD/debug header, UART/I2C headers, LEDs
Build the schematic from datasheet-recommended circuits, including:
- reverse-polarity protection on 24V input
- power-path sizing for 5A peak / 1.5A continuous
- isolated ENABLE input conditioning
- hardware ENABLE override so MCU crash cannot hold outputs on
- MOSFET gate pulldowns, gate resistors, and flyback diodes
- MCU boot-safe pin selection and decoupling
Run ERC/review and fix all violations.
Only after schematic review is clean, move to PCB layout:
- 100 × 80 mm target board
- 2-layer JLCPCB-compatible layout
- screw terminals on perimeter
- SWD at board edge
- 4× M3 mounting holes
- adequate copper for 24V/output current paths
Route, run DRC, and generate manufacturing outputs: Gerbers, BOM with LCSC part numbers, CPL, and schematic PDF.

Key design risk to resolve carefully: the hardware fail-safe. I would not rely only on firmware reading optocouplers. The output gate-drive enable should be physically blocked unless both isolated ENABLE channels are active, with MOSFET gates pulled low by default.

Save spec document

Find LCSC parts

Fail-safe architecture

Preliminary BOM

Review spec gaps

RXD

IO10

IO19

IO3

IO4

3V3

IO1

IO2

IO0

TXD

IO18

IO6

IO9

IO8

IO5

GND

IO7

GND

Reviews

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