Chat


How can I help you?

VDDIO_H
GND
VDD_PLL
RESET_BAR
DOUT[3]
DIN[8]
GPIO[4]
XTAL
DIN[1]
DOUT[12]
FB_SENSE
DIN[3]
LDO_OP
EXTCLK
GND_REG
SDATA
VDD
VDDIO_OTPM
DIN[7]
DOUT[15]
DOUT[14]
DOUT[10]
DOUT[6]
DOUT[1]
DOUT[13]
PIXCLK_IN
VDD
VDDIO_S
TRST_BAR
DIN[11]
DIN[10]
FV_IN
GND
SPI_SDI
DOUT[4]
DOUT[8]
GPIO[3]
DOUT[7]
DIN[5]
PIXCLK_OUT
DIN[2]
GND
VDD_REG
SPI_SCLK
M_SCLK
GND
GPIO[1]
GPIO[2]
SPI_CS_BAR
VDD
DIN[4]
EXT_CLK_OUT
FRAME_SYNC
SPI_SDO
GPIO[5]
TRIGGER_OUT
VDDIO_H
GND
DOUT[2]
DIN[0]
DIN[6]
FV_OUT
DOUT[9]
M_SDATA
GND
DOUT[0]
DOUT[11]
LV_IN
SADDR
GND
RESET_BAR_OUT
STANDBY
DIN[9]
GND
LV_OUT
VDD
VDD_PLL
VDD_PLL
VDDIO_S
DOUT[5]
SCLK

AP0101CS2L00SPGA0-DR1