On this ESP-12E part, MISO is pin 10, which maps to GPIO12 / MTDI / HSPI_MISO.
What it does
Primary SPI role: MISO = Master In, Slave Out.
If the ESP8266 is acting as the SPI master, this pin is the data input back into the ESP8266 from the SPI peripheral.
GPIO role: It can also be used as a normal general-purpose digital I/O when SPI is not using it.
Alternate functions: The ESP8266 datasheet also lists this pad for other multiplexed functions such as I2S data input and PWM.
Electrical characteristics
From the ESP8266EX datasheet, this pin is a 3.3 V-class digital I/O:
Operating I/O supply: tied to the chip’s I/O domain, with device working voltage 2.5 V to 3.6 V, typically 3.3 V
Input low threshold (VIL): up to 0.25 × VIO
Input high threshold (VIH): from 0.75 × VIO
Output low (VOL): up to 0.1 × VIO
Output high (VOH): at least 0.8 × VIO
Max output drive current:12 mA
It is not 5 V tolerant. Drive it only with 3.3 V logic.
Special considerations
Boot/reset caution: GPIO12 is a multifunction boot-sensitive pin in many ESP8266 designs, so avoid forcing it strongly to the wrong level during power-up/reset.
If used for SPI: connect it only to the peripheral’s MISO/output pin, and make sure no other device drives the line at the same time unless you’re intentionally sharing the SPI bus.
If used as GPIO: confirm your firmware muxes the pin away from HSPI first.
Avoid heavy loads: it is a logic pin, not a power output.
Practical usage rule
Use this pin for:
HSPI MISO when talking to SPI sensors/displays/memory, or
general 3.3 V digital I/O if SPI is unused.
Do not use it for:
direct 5 V interfaces
loads needing more than a few mA
circuitry that may hold it in an unsafe state during reset.
Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
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and High-Power Chip Resistor
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Features:
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- Nickel barrier terminations standard
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- AEC-Q200 compliant