Custom RFID PCB Design

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Work done
  • Updated the project documentation so the IC1 datasheet is the primary design reference, and captured the required 13.56 MHz operation, 3.3 V nominal supply, 2.5 V to 3.3 V operating range, and RC522-style host-header compatibility.
  • Added and documented the core support circuitry around IC1: X1 for the 27.12 MHz reference, C6 and C7 as crystal load capacitors, C8 as the VMID bypass capacitor, and R4 as the recommended 1 kΩ AUX pull-down.
  • Wired the certain, datasheet-backed schematic connections for IC1: all supply and ground pins to 3V3/GND, SPI-mode interface straps, J1 RC522-style header mapping for RST/IRQ/MISO/MOSI/SCK/SS, VMID bypassing, and unused MFIN tied low per the datasheet allowance.
  • Applied initial PCB defaults for RF-oriented implementation by setting the layout to a 4-layer stackup with baseline trace width and clearance rules, and reviewed the modified section.
Success criteria review
  • ✅ The MFRC522 datasheet has been integrated into the project documentation and used to drive the implemented power, clock, reset, IRQ, and host-interface decisions.
  • ❌ The schematic is not fully complete yet: the RF transmitter/receiver matching network around IC1 pins TX1/TX2/RX is still unfinished, X1 was discovered to be an oscillator-style symbol rather than a passive 2-pin crystal symbol, and several placeholder parts such as R1, R2, R3, and C9 remain unresolved.
  • ❌ The PCB layout review is only partial: stackup/rule intent is set, but antenna-region keepouts, grounding details, RF component placement priorities, and routing verification have not been completed.
  • ✅ RC522-style SPI header compatibility is preserved on J1, with the multiplexed signal positions maintained for the standard module pinout.
Next steps I am blocked in this session because I cannot continue executing more project changes. The next work should be to replace X1 with a true passive crystal symbol, finish the MFRC522 RF matching/filter network from a readable NXP reference design/application note, clean up unused placeholder parts, then run a final schematic and layout review.
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RFID-RC522 thumbnail
Datasheet-driven MFRC522 RFID reader PCB intended to replicate RC522 module behavior at 13.56 MHz with a 3.3 V nominal supply, 2.5 V to 3.3 V operating range, and RC522-style 8-pin host header compatibility. The MFRC522 datasheet is the authoritative source for pin usage, power rail relationships, oscillator requirements, reset/IRQ handling, and antenna interface topology. AVDD, DVDD, and TVDD must be tied to the same 3.3 V rail; PVDD must be equal to or lower than DVDD; unused MFIN must be tied to SVDD or PVSS; SVDD must be tied to a valid supply if not used independently. The design must use a 27.12 MHz crystal meeting CL 10 pF and ESR <= 100 ohms, local 100 nF decoupling on each MFRC522 supply grouping plus bulk capacitance, and an RF front-end based on the MFRC522 application diagram and reference reader matching/tuning network. PCB priorities are short crystal and RF connections, compact placement of decoupling capacitors at supply pins, solid ground reference, and protected antenna region with minimal digital routing through the RF area.

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