Smart Parking IoT Node Design
Applied changes.
0:01
a day
0:04
Work done
- Added and wired the ParkNGo schematic: U1 ESP32 DevKitC-footprint MCU, U2–U5 QMC5883L sensors, U6 RFM95W-868S2 LoRa, BATT1 3xAA holder, and C1 100uF bulk capacitor.
- Implemented V_BATT, GND, VCC_3V3, shared SCL/split SDA sensor nets, and LoRa SPI/control nets; GPIO19/GPIO18 are documented as shared physical nets for SDA_SPOT_B/SPI_MISO and SDA_SPOT_C/SPI_SCK.
- Marked unused QMC5883L and ESP32 DevKit pins as no-connect and verified ERC is clean for floating pins, no-connect violations, single-pin nets, and driver conflicts.
- Created project documentation: Project Specification, Firmware Starter, and Validation Results.
- ✅ Required components added and connected.
- ✅ Required power, I2C, LoRa SPI/control connectivity implemented.
- ✅ Four QMC5883L sensors are assigned Spot_A through Spot_D and documented as the vertical parking-row column.
- ✅ ERC passes for the checked electrical categories; only PCB airwires remain because routing has not been performed yet.
I can proceed to PCB layout next: size the board, set the stackup, place U1 with antenna edge clearance, arrange U2–U5 in a vertical column, and place power/RF sections for routing.
Place PCB layout
ESP32 antenna edge
Sensor spacing
Run DRC review
Export assembly files
a day
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Project Specification: ParkNGo Hybrid Cluster Node
Goal
Design a scalable, low-power IoT Smart Parking Hybrid Cluster Node for ParkNGo using an ESP32 DevKit-footprint MCU, four QMC5883L magnetometer ICs in a vertical parking-row column, an RFM95W-868S2 LoRa module, a 3x AA battery holder, and a 100uF polarized bulk capacitor.
Functional Blocks
- Power: BATT1 3x AA holder, V_BATT, GND, C1 100uF polarized bulk capacitor, ESP32 DevKit 5V/VIN input.
- MCU Core: U1 ESP32-DEVKITC-32UE footprint equivalent for ESP32-WROOM-32E-N4 DevKit-style use.
- Sensors: U2-U5 QMC5883L arranged as Spot_A through Spot_D in a vertical parking-row column.
- Communications: U6 RFM95W-868S2 LoRa module for 868 MHz / IN865-style configuration.
Required Net Mapping
| Function | MCU Pin | Peripheral Pin(s) | Implemented Net |
|---|---|---|---|
| Battery positive | U1:5V | BATT1:+, C1:+ | V_BATT |
| Ground | U1:GND | All device GND, BATT1:-, C1:- | GND |
| 3.3V rail | U1:3V3 | QMC VDD/VDDIO/S1, U6 3_3V | VCC_3V3 |
| Shared I2C SCL | GPIO22 | U2-U5 SCL | I2C_SCL |
| Spot_A SDA | GPIO21 | U2 SDA | SDA_SPOT_A |
| Spot_B SDA + LoRa MISO | GPIO19 | U3 SDA, U6 MISO | SDA_SPOT_B_SPI_MISO |
| Spot_C SDA + LoRa SCK | GPIO18 | U4 SDA, U6 SCK | SDA_SPOT_C_SPI_SCK |
| Spot_D SDA | GPIO5 | U5 SDA | SDA_SPOT_D |
| LoRa MOSI | GPIO23 | U6 MOSI | SPI_MOSI |
| LoRa CS | GPIO15 | U6 NSS | LORA_CS |
| LoRa reset | GPIO14 | U6 RESET | LORA_RST |
| LoRa DIO0 | GPIO2 | U6 DIO0 | LORA_DIO0 |
GPIO19 and GPIO18 are intentionally dual-purpose nets. Firmware must never enable QMC5883L split-SDA transactions and LoRa SPI transfers at the same time. During LoRa SPI activity, the sensor SDA lines on Spot_B and Spot_C must be left high impedance/inactive. During QMC Spot_B/Spot_C polling, LoRa SPI must be idle and chip-select deasserted.
No-Connect Policy
For each QMC5883L, DRDY, SETC, C1, SETP, and NC pins 3/5/6/7/14 are marked no-connect.
Component Selection Notes
The exact 3x AA battery holder is represented by Keystone 2465, a 3-cell AA holder with wire leads. The ESP32 footprint uses ESP32-DEVKITC-32UE as the closest 38-pin DevKitC-footprint library part exposing 5V, 3V3, and the required GPIO pins.
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