SRL05-TP Verification


Verify/repair ONLY active SRL05-TP
UIDb89a7117-de6a-4d4c-825c-c3d303d7d0d6 owner intendedjharwinbarrozo URLhttps://www.flux.ai/jharwinbarrozo/srl05-tp~pg8 version82d6b62e-4303-48ab-aeb6-1b3964353454. Created resumed run. No children or other projects.
Source/expected
https://www.mccsemi.com/pdf/Products/SRL05(SOT23-6L).pdf. Verified dsq_b721064563260eb2c014 ds1 exact -TP=3K TapeReel source src_page_4_table_tr_td_device_td_td_packing_td_tr_tr_510c03d58d; pins/source src_md_e3544b74b1feb0a4 verified1/3/4/6 Input Lines,2GND,5VBUS; SOT23-6L. Created names1 INPUT LINE1 Passive,2GND Ground,3 INPUT LINE2 Passive,4 INPUT LINE3 Passive,5VBUS Passive clamp rail,6 INPUT LINE4 Passive. Default lands unverified after2 queries (dsq_35bc8ddde8e69c2ed029 and dsq_710ff82abdbe236dc18a). Source body widthB1.3–1.8mm verified, created1.55mm midpoint; body length default unqualified. Parametric SOT23-6 model node intended3D.
Required
Confirm actual personal owner and UID/version; pin names/types/count; pad count/mapping/distinct/nonoverlap; coords sizes pitch row span; top-view numbering/orientation/pin1; bodyXY; model-node presence configured planar and full generated lead fit. Separate internal pass from source qualification. Renderer known omits parametric nodes: full fit unverified if unavailable, no external asset requirement. Repair confirmed source-backed errors only. No courtyard/assembly criteria.
Deliver
Final JSON all statuses actual coords/dimensions/gaps/changed/owner/UID/URL/latest_version. Save detailed own-project report. Do not republish unchanged. After confirmed fixes committed publish corrected NEW version of existing SAME UID and return new version ID.
I’ll verify the active part’s identity, pin mapping, footprint geometry, and model configuration, then save the findings. I’ll repair only source-confirmed errors and publish a new version only if a repair is needed.
Created a project doc

Part Verification

View Document

Part Verification Scope and identity
Verified only the active personal part project SRL05-TP on 2026-10-26. No other projects were read or changed; no children were started.
  • Owner: jharwinbarrozo, confirmed from current project metadata.
  • UID: b89a7117-de6a-4d4c-825c-c3d303d7d0d6.
  • URL: /jharwinbarrozo/srl05-tp
  • Latest published version: 82d6b62e-4303-48ab-aeb6-1b3964353454, independently confirmed by version history (one version).
  • Design changes: none. No source-confirmed geometry or functional errors were established. This report is the only addition. Not republished unchanged.
Pin and pad mapping — internal PASS
Six distinct terminals, six distinct enabled Top pads. Each pad UID equals its terminal element UID, giving direct one-to...

Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
INPUT LINE 1
1
Passive
GND
2
Ground
INPUT LINE 2
3
Passive
INPUT LINE 3
4
Passive
VBUS
5
Passive
INPUT LINE 4
6
Passive

SRL05-TP

SRL05-TP thumbnail