Minimalist 2-Bit Up Counter Design

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I’ll build a minimal 2-bit synchronous JK-counter schematic, add a clock/source setup suitable for simulation, then run/prepare verification for the 00→01→10→11 count sequence.

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Logic ICs and LEDs are added; I’m checking the exact pin names now so the counter nets connect correctly.

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Built the 2-bit synchronous JK counter schematic and renamed the project “2-Bit Synchronous Counter.” It uses an SN74LS109AN dual JK flip-flop, SN74LS08N AND gate, shared CLK, Q0/Q1 nets, and LED indicators.
Verification passed: simulated edge samples show 00 → 01 → 10 → 11 → 00 → 01 → 10, matching the expected up-counter sequence. ERC checks for floating/undriven/power/no-connect issues came back clean.
Suggested next steps:
  • Add a visible reset input so the counter always starts at 00.
  • Add a clock source block/switch symbol for easier manual testing.
  • Place the parts on a small PCB if you want to build it physically.
Add reset and layout
Add reset input
Add clock control
Place PCB parts
Run full review
U1
U1 1Q - U2 1A
U2 1Y - U1 2J
R1 P2 - D1 A
U1 1J - U1 2~PRE
U1 1J - U1 2~PRE
R2 P2 - D2 A
GND
GND
R2 P2 - D2 A
U1 1J - U1 2~PRE
U1 1CLK - U1 2CLK
R1 P2 - D1 A
U1 2Q - R2 P1
GND
U2 1Y - U1 2J
U1 1J - U1 2~PRE
U1 1J - U1 2~PRE
U1 1Q - U2 1A
GND
U1 1J - U1 2~PRE
U1 1CLK - U1 2CLK
GND
U1 1~Q - U1 2~K
U1 2Q - R2 P1
U1 1Q - U2 1A
U1 1~Q - U1 2~K
D1
R2
Resistance
330 ohms
U2
R1
Resistance
330 ohms
D2
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2-Bit Synchronous Counter

2-Bit Synchronous Counter thumbnail
Simple simulatable 2-bit synchronous JK up counter for verifying the 00→01→10→11 sequence.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$1.38–$1.83

Digi-Key

$1.54–$2.30

LCSC

$2.16

Mouser

$3.26

TME

$0.00

Verical

$2.01–$2.33

Controls