Power Architecture Review

ryanf

ryanf

take a look at all these components I want to make sure that the RP240 doesn't back power the buck converter and that the power switches to buck converter power when I power through this connector. is the current architecture correct? make a design doc outlining this problem.

flux

0:11

Thought for 5 sec

Thought for a moment

I’ll audit the existing power architecture around the RP2040 Zero, buck converter, and connector power path, then write a project file documenting whether back-powering is prevented and what changes are needed.

flux

4:49

Thought for 2 sec

Created 4 tasks.

1/4 Inspect schematic nets and components around RP2040 Zero, buck converter, connector power input, and power-switching devices

Thought for 2 sec

Completed design checks — found 36 issues.

Read schematic.

Thought for 4 sec

2/4 Check relevant datasheet details for buck converter and RP2040 Zero power behavior

Thought for 5 sec

Read U2 datasheet for LMR14030 EN pin behavior input voltage s.

Read U1 datasheet for RP2040-ZERO module 5V pin 3V3 pin USB po.

Read Q1 datasheet for QM6015D P channel MOSFET pinout body dio.

Read schematic.

Read "[Datasheet for QM6015D] QM6015D P channel MOSFET pinout body diode direction maximum VGS recommended reverse polarity protection orientation" in QM6015D.pdf.

Read QM6015D.pdf.

Thought for 5 sec

Read U3 datasheet for MP6513 VCC supply operating voltage inpu.

Found 10 results for RP2040-Zero WaveShare schematic 5V pin USB diode back power external 5V.

Read schematic.

Thought for 3 sec

Read waveshare.com.

Thought for 16 sec

3/4 Determine whether the existing architecture prevents back-powering and auto-selects buck power correctly

Read 11 knowledge entries.

Thought for 13 sec

Thought for 5 sec

4/4 Create/update a project file documenting the issue, findings, and recommended architecture

Thought for 45 sec

Thought for 3 sec

4/4 tasks completed.

Thought for a moment

I reviewed the power architecture and created Power Backfeed Architecture Review.
Verdict: the current architecture is not correct for preventing RP2040 Zero USB/5 V back-power into the buck output network. The V5 buck output is directly tied to U1:5V, and the RP2040 Zero’s 5 V/VUSB/VSYS node is directly connected internally, so the fix should split V5 into buck-side and RP2040-side rails with a Schottky/ideal-diode power path; I also flagged Q1 source/drain orientation and C11’s likely net/role mismatch.
Recommend ideal diode
Check Q1 orientation
Run ERC/DRC
Propose rail names
Add wiring table

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Power Backfeed Architecture Review
Date: 2026-05-18 Project: RP2040 Zero 28V Motor Controller
Question
Confirm whether the current power architecture prevents the RP2040 Zero USB/5 V node from back-powering the buck converter, and whether the system automatically switches to buck-converter power when 28 V is applied through the field connector.
Short Answer
The current architecture is not correct for the stated requirement. The buck output net V5 is directly tied to U1:5V on the RP2040 Zero module, and the RP2040 Zero documentation states that its Pin 23 / 5 V / VUSB / VSYS node is directly connected to USB VBUS. Therefore, USB power on the RP2040 Zero can drive the board V5 rail and the buck output network.
The design will power the RP2040 from the buck when 28 V is present, but it does not provide a defined, isolated power-source selection function between USB power and buck power. A diode or ideal-diode/load-switch power mux should be added between the buck 5 V output and the RP2040/module 5 V rail, and the buck enable path should be reviewed so USB-only operation does not unintentionally bias the converter output network.

Existing Power Nets Observed

NetConnections relevant to this reviewComment
VIN_28V_RAWJ1:1, Q1:S, D1:K, R1:P228 V input after connector, before protection MOSFET.
VIN_28V_PROTECTEDQ1:D, U2:VIN, C1/C9/C10/C11:P1, R2:P2Buck input rail after Q1.
V5L1:P2, C2/C7/C8/C5:P1, R5:P2, U1:5VBuck output is directly tied to RP2040 Zero 5 V pin.
V3V3_MOTORU1:3V3, U3:VCC, C4:P1Motor driver logic/motor rail is sourced from RP2040 Zero 3.3 V pin.
Net 1U2:EN, R2:P1Buck enable is pulled up from VIN_28V_PROTECTED through R2. No pull-down was found in this review set.
Datasheet / Vendor Facts Used
RP2040 Zero module
The Waveshare RP2040-Zero documentation states:
  • “The VSYS pin of the RP2040 is connected to the VUSB pin directly in RP2040-zero (named Pin23).”
  • “If you do not use USB for power supply, you can use the 5V pin for power supply.”
  • If externally powering the board, Waveshare recommends adding a diode “to avoid backflow.”
This means the module does not provide the same protected VSYS/VBUS separation you might expect from a Raspberry Pi Pico-style power path. If U1:5V is connected to the board V5 net, then USB VBUS and board V5 are effectively commoned.
LMR14030 buck converter (U2)
Relevant TI LMR14030 details:
  • VIN operating range: 4 V to 40 V.
  • EN threshold: typically 1.2 V; EN below threshold disables the device.
  • Shutdown current: typically 1 µA with EN low.
  • It is an asynchronous buck with an internal high-side MOSFET and external Schottky catch diode.
  • Recommended application has input capacitors at VIN, output capacitors at VOUT, bootstrap capacitor from BOOT to SW, feedback divider, RT resistor, soft-start capacitor, and catch diode.
The datasheet content reviewed does not establish the LMR14030 as a reverse-current-blocking load switch from output to input. Therefore, the board should not rely on the buck converter itself to enforce USB/buck power-source isolation.
Q1 reverse-polarity MOSFET (QM6015D)
The QM6015D is a P-channel MOSFET. Its body diode is oriented from Drain to Source: anode = Drain, cathode = Source. For high-side reverse-polarity protection, the recommended orientation is generally:
  • Drain/tab to input supply positive.
  • Source to protected/load positive.
  • Gate pulled low relative to source for correct polarity, with |VGS| kept within the ±20 V rating.
Current schematic connectivity shows Q1:S on VIN_28V_RAW and Q1:D on VIN_28V_PROTECTED, which is opposite of that recommended orientation. This should be reviewed/fixed independently of the USB backfeed issue.
Current Behavior by Power Scenario
Scenario 1: 28 V applied at J1, no USB
Expected current path:
J1:1 -> VIN_28V_RAW -> Q1 -> VIN_28V_PROTECTED -> U2 VIN -> buck output V5 -> U1:5V -> RP2040 Zero onboard 3.3 V regulator -> U1:3V3 -> U3:VCC
This should power the board from the buck if Q1 is operating and U2 starts correctly.
Concern: Q1 orientation appears reversed for ideal reverse-polarity protection practice. It may conduct in normal polarity once enhanced, but reverse-polarity behavior is suspect because the intrinsic diode orientation is not the usual protected-input arrangement.
Scenario 2: USB connected to RP2040 Zero, no 28 V at J1
Observed schematic path:
USB VBUS on RP2040 Zero -> RP2040 Zero Pin 23 / U1:5V -> board V5 -> buck output capacitors C2/C7/C8/C5, feedback divider R5/R6, inductor L1, SW node/catch diode network
This is a back-power condition from RP2040 USB into the buck output network. It may not raise VIN_28V_PROTECTED directly in a simple DC sense, but it is still not isolated and should not be considered a correct architecture.
Scenario 3: USB connected and 28 V connected
Because USB VBUS and buck output are directly commoned through U1:5V/V5, source selection is undefined. If the buck output is slightly above USB VBUS it may source current toward the USB/module side; if USB is higher or present during buck off/startup it can source the board V5 rail. This is not a controlled power mux.
Additional Schematic Issues Found
  1. C11 appears misconnected or mislabeled. C11 has Role Details: “RP2040 module local 5 V rail decoupling”, but it is connected from VIN_28V_PROTECTED to GND, not from V5 to GND. Either the role details are wrong or the capacitor is on the wrong net.
  2. U2 EN net appears under-defined. U2:EN is connected to R2, and R2 connects to VIN_28V_PROTECTED. No explicit EN pull-down was seen. The LMR14030 EN pin has an internal pull-up/current behavior and supports floating enable, but for deterministic behavior a UVLO divider or defined enable network is preferred.
  3. Q1 reverse-protection orientation should be corrected/rechecked. The current source/drain assignment is opposite the orientation described for high-side P-MOS reverse-polarity protection.
Option A: Simple Schottky diode isolation from buck to RP2040 5 V pin
Use a Schottky diode from buck output to RP2040/module 5 V rail:
BUCK_5V -> Schottky diode -> U1_5V_MODULE
  • Anode: buck output.
  • Cathode: RP2040 Zero 5 V pin / module-side 5 V rail.
  • Move RP2040 5 V decoupling to the module side of the diode.
  • Keep the buck feedback divider connected to the buck output side if the buck should regulate before diode drop, or to the module side if compensating for diode drop is acceptable and stable. For this design, regulating BUCK_5V and accepting a small Schottky drop into the RP2040 module is likely acceptable if the module 5 V input remains within its allowed range.
Pros: simple, cheap, reliable. Cons: diode drop reduces module input voltage and dissipates power.
Option B: Ideal diode / power mux between USB/module VBUS and buck 5 V
Use an ideal diode controller or load-switch power mux so:
  • 28 V present: buck 5 V powers the module and system 5 V rail.
  • USB-only: USB powers only the RP2040/module side if desired, without feeding the buck output.
  • Both present: buck can be given priority, or highest-voltage source can win, depending on selected controller.
Pros: controlled source selection, low drop, robust. Cons: more components and layout complexity.
Option C: Make USB programming data-only for this board
If USB should never power the board, isolate/cut the RP2040 Zero USB VBUS path or avoid connecting module 5 V directly to the board rail. This is less convenient and may require module modification, so it is not preferred unless the product requirement explicitly forbids USB powering.
  1. Split the current V5 net into at least two nets:
    • BUCK_5V: buck output, output capacitors, feedback divider source.
    • RP2040_5V: RP2040 Zero 5 V pin and local module 5 V decoupling.
  2. Add a blocking element from BUCK_5V to RP2040_5V:
    • Minimum solution: Schottky diode, anode to BUCK_5V, cathode to RP2040_5V.
    • Better solution: ideal diode / power mux IC.
  3. Keep USB backfeed off the buck output:
    • Ensure RP2040_5V cannot drive BUCK_5V when only USB is attached.
  4. Correct Q1 source/drain orientation for reverse-polarity protection:
    • Recommended: Q1:D to VIN_28V_RAW, Q1:S to VIN_28V_PROTECTED.
    • Recalculate/verify the gate divider/clamp so |VGS| <= 20 V at 28 V nominal and expected transients.
  5. Review U2:EN:
    • Use a defined UVLO divider from VIN_28V_PROTECTED to EN/GND if a 28 V power threshold is desired.
    • Ensure USB-only power cannot accidentally enable or partially bias the buck through feedback/output paths.
  6. Fix or relabel C11:
    • If it is intended as RP2040 5 V local decoupling, move it from VIN_28V_PROTECTED to the module-side RP2040_5V rail.
    • If it is intended as an input bypass capacitor, update its Role Details accordingly and consider voltage rating relative to the 28 V input and transients.
Verdict
The current schematic will likely power from the buck when 28 V is connected, but it does not correctly prevent RP2040 Zero USB/5 V back-powering of the buck output network, and it does not implement deterministic power-source selection. The architecture should be changed before layout/routing by splitting the 5 V rail and adding diode/ideal-diode isolation, and Q1 should be reoriented/revalidated for reverse-polarity protection.

    Question

    Short Answer

    Existing Power Nets Observed

    Datasheet / Vendor Facts Used

    RP2040 Zero module

    LMR14030 buck converter (`U2`)

    Q1 reverse-polarity MOSFET (`QM6015D`)

    Current Behavior by Power Scenario

    Scenario 1: 28 V applied at J1, no USB

    Scenario 2: USB connected to RP2040 Zero, no 28 V at J1

    Scenario 3: USB connected and 28 V connected

    Additional Schematic Issues Found

    Recommended Correct Architecture

    Option A: Simple Schottky diode isolation from buck to RP2040 5 V pin

    Option B: Ideal diode / power mux between USB/module VBUS and buck 5 V

    Option C: Make USB programming data-only for this board

    Recommended Schematic Changes

    Verdict

Documents

    Design Notes

    Buck Converter Manufacturing Readiness

    Power Backfeed Architecture Review

Assets

Assets are files uploaded to this project which can be used in various ways.

RP2040 Zero 28V Motor Controller thumbnail
Compact RP2040 Zero motor controller with protected 28 V input, 3.3 V reversible motor H-bridge output, USB programming, active-high trigger input, and 3.5 mm screw terminals.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$2.59–$3.38

Digi-Key

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HQonline

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LCSC

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Mouser

$7.94

TME

$8.49

Verical

$3.68–$5.05

Controls