I’ll revise the project into a clean one-page documentation schematic only: schematic symbols, visible wiring/net labels, left-to-right functional blocks, and no PCB layout work.
Created a clean one-page breadboard documentation schematic with schematic symbols, visible wires, and net labels — no PCB layers, copper, footprints, or pads-only view.
I also added Breadboard Assembly Schematic to the project files documenting that this schematic-only output is the correct assembly reference. The live netlist was rechecked; the only remaining ERC issue is the intentional U1:VP No Connect, as requested.