Breadboard Schematic for Electromagnetic Visualizer
The exported PDF is wrong because it shows PCB layers/footprints/copper instead of a readable schematic.
Please convert this project into a clean documentation schematic only.
Requirements:
- Do NOT create PCB layout.
- Do NOT show PCB footprints.
- Do NOT show copper layers.
- Do NOT show pads only.
- Use schematic symbols, not footprint symbols.
- Draw visible schematic wires.
- Keep this as a breadboard prototype documentation schematic.
Create a clean one-page schematic with these blocks from left to right:
- Power rails
- BC547 LC oscillator
- LM339 comparator
- ESP32 + OLED + calibration button
Use visible wires and net labels.
Main signal path:
+5V → L1 → OUT_OSC
OUT_OSC → BC547 collector
OUT_OSC → C1 47nF → EMIT
EMIT → C2 47nF → GND
EMIT → RE 1k → GND
BASE biased by R1 47k to +5V and R2 20k to GND
OUT_OSC → C3 10nF → SIG_IN
SIG_IN → LM339 pin 5
VREF → LM339 pin 4
LM339 pin 2 → COMP_OUT
R6 4.7k from +3V3 to COMP_OUT
COMP_OUT → R7 1k → ESP32 GPIO27
OLED VCC → +3V3
OLED GND → GND
OLED SDA → ESP32 GPIO21
OLED SCL → ESP32 GPIO22
SW1 from ESP32 GPIO14 to GND
Power:
ESP32 5V → +5V
ESP32 3V3 → +3V3
ESP32 GND → GND
LM339 pin 3 → +5V
LM339 pin 12 → GND
All grounds common.
Important:
- LM339 output pull-up R6 must connect to +3V3, not +5V.
- ESP32 GPIO is not 5V tolerant.
- ESP32 must not connect directly to OUT_OSC.
- U1:VP is intentionally unused and should remain No Connect.
After revising, make the schematic fit on one readable page for screenshot or print-to-PDF.
Thought for 6 sec
I’ll revise the project into a clean one-page documentation schematic only: schematic symbols, visible wiring/net labels, left-to-right functional blocks, and no PCB layout work.
Worked for 4 mins 22 sec
Created a clean one-page breadboard documentation schematic with schematic symbols, visible wires, and net labels — no PCB layers, copper, footprints, or pads-only view.
Files:
- Clean schematic SVG
Image
- Printable schematic HTML — open this and use browser Print → Save as PDF.
I also added Breadboard Assembly Schematic to the project files documenting that this schematic-only output is the correct assembly reference. The live netlist was rechecked; the only remaining ERC issue is the intentional U1:VP No Connect, as requested.
Export PDF version
Check schematic accuracy
Create assembly guide
Generate BOM list
Add firmware starter
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