The exported PDF is wrong because it shows PCB layers/footprints/copper instead of a readable schematic.

Please convert this project into a clean documentation schematic only.

Requirements:

Create a clean one-page schematic with these blocks from left to right:

Use visible wires and net labels.

Main signal path: +5V → L1 → OUT_OSC OUT_OSC → BC547 collector OUT_OSC → C1 47nF → EMIT EMIT → C2 47nF → GND EMIT → RE 1k → GND BASE biased by R1 47k to +5V and R2 20k to GND OUT_OSC → C3 10nF → SIG_IN SIG_IN → LM339 pin 5 VREF → LM339 pin 4 LM339 pin 2 → COMP_OUT R6 4.7k from +3V3 to COMP_OUT COMP_OUT → R7 1k → ESP32 GPIO27 OLED VCC → +3V3 OLED GND → GND OLED SDA → ESP32 GPIO21 OLED SCL → ESP32 GPIO22 SW1 from ESP32 GPIO14 to GND

Power: ESP32 5V → +5V ESP32 3V3 → +3V3 ESP32 GND → GND LM339 pin 3 → +5V LM339 pin 12 → GND All grounds common.

Important:

After revising, make the schematic fit on one readable page for screenshot or print-to-PDF.