PCB Feasibility

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PCB layout placement is done and ready for your review.
Accomplished:
  • Resized the board to 260 × 180 mm with a 4-layer stackup.
  • Placed all PCB components by functional block: high-current phases, control/ADC, auxiliary regulators, contactor I/O, CAN/JTAG, and edge connectors.
  • Replaced U18 with the compatible TPS3431-Q1 variant because the original TPS3431SDRBR footprint had a blocking copper-overlap issue; I filed an internal part-quality report.
  • Placement/pre-routing checks are now clean except for routing advisories that are expected and not blocking.
Open items:
  • I stopped before routing at the normal placement-to-routing checkpoint.
  • TPL9202 is still not suitable for real 24 V contactor coils; replace that driver approach before final PCB release.
  • High-current power paths will need copper pours/bus geometry, not just thin auto-routed traces.
Suggested next steps:
  1. Review the component placement in PCB view.
  2. If placement looks good, tell me “route it” and I’ll start routing.
  3. After routing, run DRC/airwire cleanup and then review high-current copper widths/thermal areas.
D

damien11

route it

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I’ll route the PCB now: run the routing pre-check, set conservative trace-width priorities for power/control nets, auto-route the board, then review remaining airwires/DRC issues.

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Routing could not continue because the account currently has no available ACUs, so AI layout/routing tools are unavailable.
Accomplished this session:
  • Started the routing phase and prepared the routing checklist.
  • Confirmed the intended routing flow: pre-check → set routing rules/width priorities → auto-route → DRC/airwire cleanup.
  • Loaded the routing/remediation procedures needed for the next step.
Open items:
  • Run routing pre-check again.
  • Set power/control routing widths and priorities.
  • Run the full-board auto-router.
  • Review and fix remaining airwires/DRC issues.
  • Add high-current copper/pour strategy after initial routing; auto-routing alone is not sufficient for the 40 A power path.
Suggested next steps:
  1. Add ACUs to the account.
  2. Then send “continue routing” and I’ll resume from the routing pre-check.
Continue routing
Set 40A strategy
Manual routing steps
Check DRC airwires
Define net priorities
Sign up to send

Files

Schematic

Layout

3D View

Project Specification — 3 kW Programmable CV/CC Supply
Project Overview
  • Status: Draft schematic start
  • Device: Programmable isolated-output CV/CC bench/lab supply architecture targeting 0.5–100 V output, 0–40 A current limit, and 3 kW maximum output power.
  • Current scope: full four-phase system schematic. Mean Well AC/DC power modules, matrix contactors, high-current fuses, busbars, enclosure wiring, fans, and emergency-stop mains hardware are represented as off-board interfaces rather than PCB-mounted parts.
Intended Use
  • Prototype/validation platform for a high-power programmable DC supply.
  • Intended development sequence starts with schematic capture and design review, followed by one-phase power-stage validation before committing to a full 3 kW layout and enclosure.
What the Device Should Do
  • Generate programmable CV and CC output from 0.5 V to 100 V.
  • Deliver up to 40 A below the power-limit knee, constrained to 3 kW maximum.
  • Switch between LOW bus mode (~26.4 V, four supplies in parallel) and HIGH bus mode (~105.6 V, four supplies in series) with output interruption.
  • Provide hard/firmware protection for overcurrent, overvoltage, phase imbalance, overtemperature, failed contactor states, and discharge/precharge sequencing.
Main Features
  • Four interleaved synchronous buck phases at 100 kHz/phase.
  • Off-board supply/contactors modeled via connectors and control/feedback interfaces.
  • C2000 controller with PWM, trip-zone, ADC, and sigma-delta filter inputs.
  • Isolated per-phase current measurement plus independent total-current hardware trip.
  • Precision monitoring ADC for calibration and telemetry.
  • Dedicated auxiliary rails independent of the reconfigurable high-power bus.
System Architecture
Diagram



  
    
  
  
    
  




































Off-board AC/DC Modules\n4x 26.4 V calibrated
Off-board Series/Parallel\nContactor Matrix
PCB HV Bus Interface\nPrecharge / brake / bus caps
Phase 1 Buck
Phase 2 Buck
Phase 3 Buck
Phase 4 Buck
Output Bus + Capacitor Banks
Output Terminals
Voltage + Current Sensing
C2000 Controller
Gate Drivers + Trips
Off-board 24 V Aux Supply
12 V / 5 V / 3.3 V Rails
Hardware Subsystems
  • Off-board power-source interface: four 24 V/960 W AC/DC modules adjusted to 26.4 V, represented by module terminal/control connectors.
  • Off-board contactor matrix: series/parallel mode contactors, output contactor, precharge bypass, and LV capacitor-bank contactor represented by coil-drive and auxiliary-feedback connectors.
  • Four-phase buck stage: 200 V MOSFET half-bridges, gate drivers, inductors, phase shunts, local input capacitors, bootstrap networks, and output bus combining.
  • Sensing/protection: per-phase isolated delta-sigma modulators, total-current Hall sensor/comparator, remote/local voltage sense, bus OVP/brake, output discharge.
  • Control: TI C2000 controller, precision ADC, isolated CAN, watchdog, debug/programming.
  • Auxiliary rails: off-board 24 V auxiliary input; onboard 12 V, 5 V, and 3.3 V regulators.
Interfaces and Connections
  • High-power bus: BUS+, BUS− from off-board matrix.
  • Output: OUT+, OUT− high-current terminals and remote-sense pair.
  • Off-board controls: AC/DC enable, contactor coil drives, auxiliary contact feedback, current-share relay controls.
  • Communications: isolated CAN.
  • Debug: C2000 programming/debug interface.
Power and Runtime Expectations
  • Main output: ≤3 kW, up to 100 V and 40 A depending on setpoint.
  • Auxiliary input: 24 V off-board supply, target ~150 W class.
  • Onboard rails: 12 V gate-driver rail, 5 V analog/sensor/relay logic rail, 3.3 V MCU/digital rail.
Power Tree and Power Budget

Table

Rail / PathSourceEstimated Load / Rating Basis
Main HV busOff-board supply matrix26.4 V LOW or 105.6 V HIGH; ~30 A bus current at 3 kW/95% in HIGH mode
OutputFour-phase buck0.5–100 V, 0–40 A, 3 kW max
12 VOnboard buck from 24 V auxGate drivers and analog protection circuits; provisional sizing pending datasheet-current summation
5 VOnboard buck from 24 V auxADCs, current modulators, sensors, CAN side support; provisional sizing pending datasheet-current summation
3.3 VLDO/buck-derived from 5 VMCU and digital logic; provisional sizing pending datasheet-current summation
Manufacturing and Assembly Expectations
  • Professional SMD PCB for control and power electronics.
  • High-current AC/DC modules, contactors, fuses, copper busbars, mains wiring, fans, and enclosure hardware are off-board.
  • High-current PCB copper, creepage/clearance, thermal relief, gate-drive layout, current-sense Kelvin routing, and snubber tuning require prototype validation.
Firmware-Relevant Hardware Requirements
  • Four synchronized PWM phases with 0/90/180/270° phase offsets.
  • Hardware trip inputs must disable PWM without firmware latency.
  • ADC/SDFM measurement channels for phase currents, total current, bus voltage, output voltage, temperatures, contactor feedback, and auxiliary rail telemetry.
  • Sequenced state machine for precharge, range changes, output contactor, discharge, and fault handling.
Physical Design Expectations
  • Board size, enclosure, airflow, heatsinking, busbar interfaces, and connector locations are TBD.
  • Layout must treat switch nodes, gate loops, shunt Kelvin signals, isolated boundaries, and high-current planes as critical.
Important Design Decisions
  • Use four fixed AC/DC modules off-board rather than designing the mains front end on the PCB.
  • Use two bus modes only: LOW 4P and HIGH 4S.
  • Keep contactors off-board and represent them through control/feedback connectors.
  • Use one common controller supervising all four phases rather than paralleling independent converters.
  • Build the schematic for the full system now, but validate a one-phase prototype before full-power assembly.
Assumptions
  • Mains AC handling remains outside the PCB/enclosure wiring model for this schematic pass.
  • The first schematic revision is architectural and will require datasheet-backed refinement, loop compensation calculation, thermal analysis, and prototype test results.
  • Exact connector families and board mechanical constraints are not yet specified.
Change Notes
  • Initial specification created from the provided Rev A reference implementation and user request to start the full four-phase schematic with power modules/contactors off-board.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes