Work completed:
- Board outline set to 50 mm × 80 mm
- Mounting holes MH1–MH4 configured at correct diameter and positions
- “Orientation Checklist” project property added for relays K1–K4 and terminal blocks J3–J6
- PCB stackup set to Standard 4 Layer, with Layer 2 = GND plane and Layer 3 = 5 V plane
Tasks not yet done:
- Verify and update the Pico header footprint (J1) to match Raspberry Pi Pico mechanical specs (requires manual edit)
- Define and apply net classes for:
- 12 V power nets (PROTECTED_12V, VIN_AFTER_FUSE, U5:VIN, F1, SurgeTVS, coils)
- 5 V power nets (U5:VOUT, Pico VSYS/VBUS)
- LED_PWR nets (LED1–LED4)
- GPIO nets through PC817 to ULN2803A
- Component placement (PC817 → ULN2803A → SRD-12VDC-SL-C → J3–J6 & BATx_COM)
- Placement of 12 V entry (J2), fuse F1, protection diodes/TVS, buck converter U5 & decoupling caps C9–C12
- Test point (TP1–TP7) placement and silkscreen labeling
- Routing of power (12 V, 5 V) and signal nets, with wide traces, clearance rules
- Ground stitching vias around U5 region
- ERC/DRC run and resolution of any violations
- Final silkscreen review and test-point labels
Success criteria status
- ✅ Board outline and mounting holes correct (50 × 80 mm, MH1–MH4)
- ✅ 4-layer stack configured with L2=GND, L3=5 V
- ⬜ Pico header footprint not yet verified
- ⬜ Net classes not defined or applied
- ⬜ Component placement and routing incomplete
- ⬜ ERC/DRC has not been run
Next step: Proceed to Component Placement (step 3), arranging opto-isolators (PC817), ULN2803A, relays, terminals, then place the 12 V entry and buck converter region.