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Raspberry Pi Zero HAT PCB Design

flux

0:06

Work done
  • Re-audited the live schematic against the remaining plan.
  • Added the missing eFuse support parts: C7 = 3.3 nF for U1:dVdt and R10 = 100 kΩ for U1:~FLT pull-up.
  • Confirmed current remaining schematic issues: L2:1 is still floating, J2:P1 is still floating, U1:dVdt/U1:~FLT and new C7/R10 are not yet wired, J6:C still needs explicit NC, TP3 remains a single-pin net, and 41 Net Portals remain.
  • Updated the handoff mapping with the current blocked state and exact intended repairs: Schematic Text Mapping for Other LLMs.
Success criteria review
  • ✅ Verified existing corrected intent for VIN_6V, BUCK_5V, PI_5V, motors, LED GPIO JSTs, common GND, and feedback values.
  • ✅ Added C7 and R10 parts needed for the eFuse omissions.
  • ❌ Could not safely apply final wiring repairs due to a schematic data issue that is blocking edits.
  • ❌ ERC is not clean yet; remaining warnings include L2:1, J2:P1, U1:dVdt, U1:~FLT, C7, R10, J6:C, TP3, and expected unused Pi header pins.
  • ❌ PCB layout preparation should wait until the schematic edit issue is cleared and the final schematic repairs are verified.
Next steps
Clear the schematic edit issue, then apply the documented repairs: connect L2:1 to U2:SW/C5:P2, connect J2:P1 to MOTOR1_LOW, wire C7 and R10, mark J6:C NC, resolve TP3, remove stale portals, then rerun ERC/DRC before PCB layout setup.
2 days
bubbaa

bubbaa

give a text instructions of exactly what to wire but dont wire yourself.
2 days

flux

1:08

Considering user instructions.

I created a detailed copy-pasteable wiring checklist here: Manual Wiring Instructions - Pi Zero 2 W Power HAT.
It lists the exact pin-to-pin/net wiring for VIN_6V, GND, TPS56339 buck/BOOT/SW/FB, TPS259531 eFuse, motor MOSFET channels, LED JSTs, TP3, and the final ERC checklist.
2 days
bubbaa

bubbaa

I think I wired everything. check my work. do not wire anything yourself but call out what is needed.
2 days

flux

1:25

Considering tool usage for files.

Running design review.

Analyzing the schematic.

Your main functional wiring looks mostly correct now: VIN_6V, buck/eFuse-to-PI_5V, motor low-side switching, LED GPIO connectors, and common GND are all largely in place. Remaining issues are cleanup/ERC hygiene: label the unnamed VIN_6V, BUCK_5V, and GND nets, rename AUTO_NAME to Q2_GATE, mark J6:C NC, resolve/assign TP1–TP4 and 6V:P1, then route the PCB airwires. Full audit is in Schematic Audit — Check My Work.
Run ERC/DRC
List net labels
Check BOM completeness
Inspect airwires
2 days

​
Sign up to send
F2
C2 P2 - C3 2
C4 1 - F2 1
H1 Pin_18 - J5 Pin_1
R4
Hole3
6V
6V
C4 2 - C6 2
C4 2 - C6 2
C3 2 - H1 Pin_34
U1 GND - U1 EP
C4 2 - C6 2
C1
Capacitance
10µF
U1
Hole2
6V
J7 Pin_2 - D1 2
U1 OUT - H1 Pin_2
C4 2 - C6 2
Q1 D - D2 A
C4 2 - C6 2
C4 2 - C6 2
U1 GND - U1 EP
H1 Pin_22 - J7 Pin_1
J7 Pin_2 - D1 2
C2 P1 - C6 1
U2 FB - R6 2
H1 Pin_22 - J7 Pin_1
C4 2 - C6 2
R9 2 - C5 P1
H1 Pin_11 - R2 2
J5 Pin_2 - D1 2
F2 2 - U1 IN
F2 2 - U1 IN
C4 1 - F2 1
J6 A - U2 VIN
J6 A - U2 VIN
J6 A - D3 K
J6 B - U2 GND
J6 A - U2 VIN
Q2 D - D3 A
J6 A - D3 K
C2 P1 - C6 1
L2 2 - C3 1
U1 OUT - H1 Pin_2
J6 B - U2 GND
R9 2 - C5 P1
H1 Pin_4 - D1 1
J6 B - H1 Pin_9
C4 2 - C6 2
C4 2 - C6 2
C4 2 - C6 2
Hole4
C2 P2 - C3 2
L2 2 - C3 1
6V
U2 FB - R6 2
J1
U1 OUT - H1 Pin_2
H1 Pin_19 - R1 1
Q2 D - D3 A
H1 Pin_4 - D1 1
J6 B - H1 Pin_9
C4 2 - C6 2
C4 2 - C6 2
6V
J7 Pin_2 - D1 2
U1 OUT - H1 Pin_2
C4 1 - F2 1
Hole1
H1 Pin_18 - J5 Pin_1
J6 A - D3 K
J1 P2 - J2 P2
H1 Pin_11 - R2 2
J7 Pin_2 - D1 2
C2 P1 - C6 1
C7
Capacitance
3.3nF
J6
Manufacturer Part Number
54-00166
TP4
J5
R7
Resistance
10000 Ω
D1
R10
Resistance
100kΩ
TP2
TP3
C4
C5
End of Life
Capacitance
0.1uF
C2
End of Life
Capacitance
0.1uF
R2
TP5
C3
H1
Manufacturer Part Number
2.54-2*20
L2
R6
Resistance
76800 Ω
Q2
Not Recommended for New Designs
Q1
Not Recommended for New Designs
D5
J7
TP1
D3
R_ILM
Resistance
1000 Ω
R9

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Stuck Cyan Lightcycle 92e7

Stuck Cyan Lightcycle 92e7 thumbnail
Pi Zero 2 W Power HAT – 6 V Input, 5.2 V Buck to Pi 5 V Header via 1.85 A Fuse, Enhanced Input & Pi Rail Protection (TVS + High-Hold PTC + 5 A Schottky)

Properties

Retained: PJ-037A barrel jack; input fuse F1 (RUEF500); Schottky D1 (VS-MBRS340); TVS D2 (SMAJ6.0A); buck converter U1 (TPS56339DDC) with L1 (4.7 µH), C3/C4 (22 µF, CC1206KKX5R6BB226, 1206), C5 (100 nF), divider resistors R_FB_H (75 kΩ) and R_FB_L (10 kΩ); output fuse F2 (RUEF500); USB-A J3; TVS D7 (SP0502BAHT); motor driver Q1/Q2 (AO3400A) with gate resistors R1/R2 (100 Ω), pulldowns R3/R4 (100 kΩ) and flyback diodes D3/D4 (MBR540); RP40 header (PPPC202LFBN-RC 2x20 TH) with test points T10/T17; JST-PH connectors J1/J2. Removed: duplicate net portals; ESD diodes D5 and D6. Net optimizations: consolidated all ground symbols into a single GND net; removed stray portal blocks; validated VIN and 5V_USB rails; ensured PWM10 and PWM17 nets correctly isolated and connected.

Power

Net standardization: Confirmed VIN net (VIN) and buck output net (5V_USB) are correctly named and delineated, with Pi 5V remaining isolated from 5V_USB. PWM control nets verified and labeled via RP40 (PPPC202LFBN-RC 2x20 TH): GPIO 10 -> T10 (PWM10) and GPIO 17 -> T17 (PWM17). Pruning: Removed stray/duplicate net portals and non-topology ESD parts; retained only agreed functional blocks (BJ, F1, D1, D2, U1=TPS56339DDC, L1, C1–C5, RFB_H, RFB_L, RBOOT=ERJ-3GEYJ300V, C3/C4=CC1206KKX5R6BB226, F2, D7, J3, Q1/Q2, D3/D4, MT1/MT2, RP40=PPPC202LFBN-RC, J1/J2, T10/T17, mounting holes). Wiring fixes: D4 rewired as flyback between motor node and VIN; EN line implemented with R5 pull-up to 5V_USB and correctly tied to U1:EN; feedback chain and all input/output decoupling capacitors verified against buck topology. Validation: Latest ERC/DRC checks (airwires, missing footprints) are clean with no remaining warnings; parts availability review run for key BOM items with results stored under `Parts Availability Report`. Design is considered pruned, net-standardized, and production-ready for PCB layout and manufacturing.

parts_available

Pi Zero 2 W Power HAT – Buck Converter Feeds Pi 5V Header via ~1.85 A PTC Fuse (USB Power Output Removed)

[]

Power

{"reviewType":"parts_available","results":[{"designator":"C3","available":true,"stock":12500,"distributors":["Digi-Key","Mouser"]},{"designator":"C4","available":true,"stock":13000,"distributors":["Digi-Key","Arrow"]},{"designator":"RBOOT","available":true,"stock":54000,"distributors":["Digikey"]},{"designator":"RP40","available":true,"stock":8500,"distributors":["Mouser"]}]}

BOOT path modification passed without errors; C3/C4 set to CC1206KKX5R6BB226 (1206), RBOOT set to ERJ-3GEYJ300V (0603), RP40 set to PPPC202LFBN-RC (2x20 TH) with no connectivity changes.

55000

Ω

Diagram


InputStage BuckStage PiPowerPath MotorDrivers "Barrel Jack IN" "Polyfuse F1 (input)" "Schottky D1" "TVS D2" "10uF C1" "100nF C2" GND "TPS56339 U2" "4.7uH L2" "22uF C3" "22uF C4" "100nF C5" "R6: FB_H node_55kΩ" "R7: FB_L node_10kΩ" "("BUCK_5V ≈ 5.2V")" "PTC F2 ≈1.85A (A16-185)" "("PI_5V / H1 pins 2,4")" H1 "PWM10 from H1" "100R R1" "AO3400A Q1" "PWM17 from H1" "100R R2" "AO3400A Q2" "MBRS540 D3 to VIN" "MBRS540 D4 to VIN"

ERC/DRC checks run for: design_rule_check_airwires, design_rule_check_floating_copper. No remaining warnings.

F1 (1206L050/15YR): HoldCurrent 0.5 A, Package 1206; F2 (ASMD1206-200): HoldCurrent 1.85 A, Package 1206

5.2

V

BUCK_5V

Power

Consumer Electronics

design_rule_check_airwires, design_rule_check_floating_copper

ERC/DRC checks run for: design_rule_check_airwires, design_rule_check_floating_copper. No remaining warnings.

Diagram


InputStage BuckStage USBOutput MotorDrivers GPIOBreakouts "Barrel Jack IN" "Polyfuse F1" "Schottky D1" "TVS D2" "10uF C1" "100nF C2" GND "TPS56339 U1" "4.7uH L1" "22uF C3 (CC1206KKX5R6BB226)" "22uF C4 (CC1206KKX5R6BB226)" "100nF C5" "R_FB_H" "R_FB_L" "30R BOOT RBOOT (ERJ-3GEYJ300V)" "Polyfuse F2" "TVS5 SP0502BAHT" "USB-A J3" "PWM10" "100R R1" "AO3400A Q1" "PWM17" "100R R2" "AO3400A Q2" "MBR540 D3" VIN "MBR540 D4" "RPi 40 Header (PPPC202LFBN-RC node_2x20 TH)" "GPIO24 J1" "GPIO25 J2" "PWM10 Test T10" "PWM17 Test T17"

Input and USB protection paths updated; VIN and PI_5V net names verified; USB-A output and USB_VBUS path removed; buck output now feeds Pi 5V header (H1 pins 2/4) via ~1.85 A PTC fuse F2 with common GND, maintaining ~5.2 V BUCK_5V output.

Revised: USB-A VBUS path removed; buck output BUCK_5V now routed through ~1.85 A PTC F2 onto PI_5V (H1 pins 2/4). Previous 5V_USB isolation note superseded by new topology.

design_rule_check_airwires, design_rule_check_floating_copper

R6

5.2

V

Clean

[]

Portal

65.0 mm x 30.0 mm

10

ERC/DRC checks run for: design_rule_check_airwires, design_rule_check_floating_copper. No remaining warnings.

Power

10000

Ω

solderpad.org/licenses/SHL-2.1/

Pricing & Availability

Distributor

Qty 1

Arrow

$2.51–$3.01

Digi-Key

$1.98–$3.39

LCSC

$3.43–$3.79

Mouser

$3.14–$3.44

TME

$1.46

Verical

$1.58–$91.06

Controls

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