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Functional Verification Report

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Functional Verification Report
Review date: 2026-09-01
Scope: Read-only review of the current schematic and PCB. No fixes were applied.
Evidence policy: PASS means confirmed from live project data and, where required, immutable datasheet evidence. FAIL means live project data demonstrates a functional or manufacturing defect. UNVERIFIED means the required external evidence or physical mapping was unavailable. Datasheet indexing returned “immutable evidence not ready” for the TPIC6B595 and SN74AHCT125 queries, so claims requiring datasheet clauses are not promoted to PASS.
Executive result
Overall: FAIL. The schematic signal topology is coherent, but the board has active PCB errors and the 12 V-to-5 V linear-regulator architecture has a severe thermal ri...
Completed the read-only functional review in Functional Verification Report.
Overall: FAIL. Primary blockers are J1/J3/DS1 placement and copper conflicts, LM1117 thermal dissipation, unsafe/unverified USB–12 V power interaction, and the unverified 40101B-5 pinout. No design changes were applied.
tell me what this board is supposed to do and how you accomplished it, new document in the files
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Purpose and Implementation

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Purpose and Implementation What This Board Is Supposed to Do
The Days Since Counter is a large, network-capable two-digit counter intended to show the number of days since a selected event. Typical uses include “days since the last incident,” “days since a milestone,” or any other value that can be represented from 00 to 99.
The Raspberry Pi Pico 2 W provides the intelligence and wireless connectivity. Firmware determines the value to display—either by calculating elapsed days from a stored date or by receiving an updated value over Wi-Fi—and converts the two decimal digits into seven-segment patterns.
The board is designed as a self-contained sign:
  • A 12 V DC input powers the board.
  • Two large common-anode seven-segment modules provide the visible digits.
Created Purpose and Implementation. It explains the board’s intended “days since” function, power architecture, Pico firmware role, logic buffering, serial display drivers, LED current paths, expansion bus, and physical PCB implementation.

DS1
U2
DS2
U1
U3
J1
R12
Resistance
220 ohms
R13
Resistance
220 ohms
R11
Resistance
220 ohms
R20
Resistance
10kOhms Ω
R3
Resistance
220 ohms
R19
Resistance
33ohms Ω
R9
Resistance
220 ohms
R5
Resistance
220 ohms
R7
Resistance
220 ohms
R6
Resistance
220 ohms
R15
Resistance
220 ohms
R16
Resistance
1000 ohms
R8
Resistance
1000 ohms
R18
Resistance
33ohms Ω
R2
Resistance
220 ohms
R17
Resistance
33ohms Ω
R10
Resistance
220 ohms
R14
Resistance
220 ohms
R1
Resistance
220 ohms
R4
Resistance
220 ohms
J3
C5
Capacitance
100nF
Flux Logo1
C4
Capacitance
100uF
U5
J2
C1
Capacitance
100nF
C7
Capacitance
100nF
C2
Capacitance
10uF
C6
Capacitance
100nF
C3
Capacitance
10uF
U4
Purpose and Implementation
What This Board Is Supposed to Do
The Days Since Counter is a large, network-capable two-digit counter intended to show the number of days since a selected event. Typical uses include “days since the last incident,” “days since a milestone,” or any other value that can be represented from 00 to 99.
The Raspberry Pi Pico 2 W provides the intelligence and wireless connectivity. Firmware determines the value to display—either by calculating elapsed days from a stored date or by receiving an updated value over Wi-Fi—and converts the two decimal digits into seven-segment patterns.
The board is designed as a self-contained sign:
  • A 12 V DC input powers the board.
  • Two large common-anode seven-segment modules provide the visible digits.
  • A Pico 2 W calculates or receives the day count.
  • Serial power-driver ICs switch the relatively high segment current.
  • Expansion headers expose power and display-control signals for testing or system integration.
  • Front and rear silkscreen artwork identify the project and its Flux origin.
System Architecture

Diagram


DATA, shift clock, latch clock serial cascade 12 V DC input +12 V rail Left seven-segment display Right seven-segment display 5 V linear regulator +5 V logic rail Raspberry Pi Pico 2 W 3.3 V to 5 V logic buffer TPIC6B595 driver for left digit TPIC6B595 driver for right digit DS2 segment resistors DS1 segment resistors J2 and J3 expansion bus
How the Design Accomplishes It
1. Input Power and Voltage Regulation
Power enters through J1, a Tensility 54-00164 barrel connector. Its center-power contact supplies the +12 V rail, while the return contacts connect to the common ground system.
The 12 V rail performs two jobs:
  1. It directly supplies the common-anode connections of both large LED displays.
  2. It feeds U4, an LM1117 fixed 5 V regulator, which produces the logic supply.
The regulator support network includes:
  • C1: 100 nF input bypass capacitor
  • C2: 10 µF input capacitor
  • C3: 10 µF output stability capacitor
  • C4: 100 µF bulk capacitor near the power input
The design uses wider 1.0 mm traces for +12 V, +5 V, and ground. Ground copper fills are assigned on both PCB copper layers to reduce return-path impedance and provide a broad common reference.
2. Controller
U1, a Raspberry Pi Pico 2 W, is the main controller. Its RP2350-based microcontroller can retain the reference date, calculate elapsed days, communicate over Wi-Fi, and generate the display-control stream.
Three Pico GPIO signals are used:

Table


Pico signalFunction
GPIO19Serial display DATA
GPIO18Shift-register clock, SRCK
GPIO17Output latch clock, RCK
The Pico is powered from the regulated +5 V rail through its VSYS input. Its USB VBUS pin is intentionally outside the board’s normal 12 V power path.
3. Logic-Level Buffering
The Pico produces 3.3 V logic, while the display-driver logic operates from 5 V. U5, an SN74AHCT125 quad buffer, provides a robust interface between these domains.
Three buffer channels translate DATA, SRCK, and RCK. Their active-low output-enable pins are tied low, so those channels remain enabled. The unused fourth channel is placed in a defined state rather than being left floating.
R17, R18, and R19 are 33 Ω series resistors on the three control lines. They reduce edge ringing and limit transient current on the long PCB interconnects. C5 provides local 100 nF decoupling for U5.
4. Serial Display Drivers
The board uses two TPIC6B595 power shift registers:
  • U3 receives the serial DATA stream and drives the right digit, DS2.
  • U2 receives cascaded data from U3 and drives the left digit, DS1.
Both devices share the SRCK shift clock and RCK latch clock. The Pico shifts a 16-bit segment pattern into the pair, then pulses RCK so both digits update together without showing intermediate shift states.
The TPIC6B595 outputs are open-drain current sinks. An illuminated segment follows this path:

Text


+12 V -> display common anode -> LED segment -> current-limiting resistor -> TPIC drain output -> GND
This separates the high-current LED switching from the Pico GPIO pins. The Pico controls only low-current logic inputs; the TPIC devices handle the segment current.
The shared active-low clear input, SRCLR_N, is held high by R20, a 10 kΩ pull-up, so the shift registers normally retain shifted data. The TPIC output-enable inputs are grounded, keeping the output stages enabled. C6 and C7 provide local 100 nF supply decoupling.
5. Display and Segment Current Control
DS1 and DS2 are large 40101B-5 common-anode seven-segment displays. Each digit contains segments A through G plus a decimal point. Both common-anode pins of each module connect to +12 V.
Each segment has its own resistor:
  • R1–R7 and R9–R15: 220 Ω for segments A–G
  • R8 and R16: 1 kΩ for the decimal points
The individual resistors control LED current and isolate each segment. U2 drives the eight DS1 channels, and U3 drives the eight DS2 channels. DRAIN0 through DRAIN7 are assigned in order to A, B, C, D, E, F, G, and DP.
6. Serial Data Operation
To display a number, the firmware performs these steps:
  1. Determine the desired value from 00 to 99.
  2. Split the value into a tens digit and a ones digit.
  3. Look up the A–G segment pattern for each digit.
  4. Shift the 16 segment-control bits out on DATA while pulsing SRCK.
  5. Pulse RCK to transfer the new pattern to the TPIC output latches.
  6. Repeat only when the displayed count changes or when refreshing status.
Because U3 cascades into U2, one three-wire serial interface controls all sixteen display channels.
7. Expansion and Test Connections
J2 and J3 are mirrored six-pin headers carrying the board-wide interface:

Table


PinSignal
1+12 V
2GND
3+5 V
4DATA
5SRCK
6RCK
These headers provide access to the power rails and serial display bus. They can be used for measurement, debugging, external control, or expansion. Matching signals are routed across the long board so they are available at both ends.
Physical PCB Implementation
The PCB is a long, two-layer sign with the large displays on the viewing side and most control electronics on the back. This keeps the front visually clean while leaving the power, controller, and driver components accessible from behind.
The implementation includes:
  • Corrected through-hole geometry for the large displays
  • Bottom-side placement of the Pico, TPIC drivers, level buffer, regulator, resistors, and power connector
  • Top-side “Days Since” GitHub artwork
  • A large rear “Built with Flux”/Flux logo marking
  • 1.0 mm power and ground routing
  • Ground-referenced copper on both layers
  • A +5 V thermal copper feature associated with the LM1117 output/tab region
Functional Block Summary

Table


BlockMain partsRole
Power inputJ1, C4Accept and stabilize 12 V DC
5 V supplyU4, C1–C3Generate logic power
ControllerU1Calculate or receive the day count
Logic interfaceU5, R17–R19, C5Translate and condition control signals
Serial sink driversU2, U3, R20, C6, C7Convert serial patterns into sixteen high-current sink outputs
Left digitDS1, R1–R8Display the tens digit
Right digitDS2, R9–R16Display the ones digit
Expansion busJ2, J3Expose power and display-control signals
Intended User Experience
Once assembled and programmed, the sign is powered from a 12 V adapter. The Pico boots, obtains or calculates the current day count, and writes the appropriate segment pattern to the two display drivers. The result is a large, readable two-digit “days since” value. Wi-Fi capability allows the reference event or displayed count to be managed without physically accessing the board, depending on the final firmware implementation.
Current Engineering Note
This file describes the intended function and the implemented electrical architecture. The existing functional-verification work identified PCB placement, copper-clearance, regulator thermal, power-interaction, and display-pinout items that should be resolved or formally verified before manufacturing. Those issues do not change the operating concept described here, but they are part of the remaining release work.
  • What This Board Is Supposed to Do

  • System Architecture

  • How the Design Accomplishes It

  • 1. Input Power and Voltage Regulation

  • 2. Controller

  • 3. Logic-Level Buffering

  • 4. Serial Display Drivers

  • 5. Display and Segment Current Control

  • 6. Serial Data Operation

  • 7. Expansion and Test Connections

  • Physical PCB Implementation

  • Functional Block Summary

  • Intended User Experience

  • Current Engineering Note