CRC/DRC Status Check
Worked for 26 mins 33 sec
Completed the low-voltage CT schematic compatibility fix and ran checks on both boards.
What changed on the linked low-voltage board:
- R2 is now a 100 Ω series current-limiting resistor, not a CT burden.
- Added D3 BAT54S clamp protection:
- D3 pin 1 → GND
- D3 pin 2 → 3V3
- D3 pin 3 → CT_SENSE_CLAMP
- Final CT path:
- J5 pin 1 → CT_SENSE_RAW → R2 → CT_SENSE_CLAMP → U4 +
- J5 pin 2 → CT_REF → R3/R4 midpoint → U4 -
Review results:
- Current power-board project: clean, no open ERROR/WARNING/OPEN/UNCERTAIN issues.
- Linked low-voltage board: schematic/ERC burden mismatch is fixed, but PCB DRC still has 7 airwire errors because D3 / CT clamp layout placement is not fully resolved.
Open items:
- Low-voltage board needs D3 physically placed near U4/R2 and the CT clamp/reference airwires routed.
- Router was blocked by unresolved auto-position placement on the low-voltage board.
Suggested next steps:
- Open the low-voltage board PCB and manually place D3 near U4/R2.
- Route CT_SENSE_RAW, CT_SENSE_CLAMP, CT_REF, D3 3V3, and D3 GND.
- Re-run DRC on the low-voltage board until the 7 airwires clear.
- Then run a final cross-board manufacturing validation.
Estimated time saved vs. manual EDA workflow: ~2–4 hours.
Place, route, review
Fix D3 placement
Explain airwires
Check clamp orientation
Run final validation
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Rollback Reference
Layout rollback point
- Label: HV-layout-before-optimization-2026-04-21
- Purpose: Restore the power-board layout to the state immediately before hazardous-voltage optimization, connector edge relocation, and HV bus compaction.
Snapshot notes
- Layout review at rollback point showed:
- Overlapping copper: pass
- Missing footprints: pass
- Protected intrusions: pass
- Airwires: 101
- This rollback point refers to the pre-optimization placement state requested by the user.
Manual rollback procedure
- If a later placement pass is not acceptable, compare the updated layout against this documented reference.
- Use project history/version controls in Flux to restore the state associated with this timestamp and label.
- After restoring, verify the same review signature above before continuing.
Components intended for optimization after this rollback point
- HV / mains entry cluster: J6, F1, RV1, RT1, L2, CX1
- HV bus and power stage cluster: J2, J3, J4, Q1, Q2, U1, C1, C2, R18, R19
- Low-voltage/control parts should remain segregated away from the HV region.
Layout rollback point
Snapshot notes
Manual rollback procedure
Components intended for optimization after this rollback point
