RP2040-Zero Footprint Discussion


Final manufacturing checklist passed for REV A: no open DRC/ERC issues in the checked categories, connector/pinout/power mapping verified, and I added the 5V NC / DO NOT USE silkscreen warning. The only caveat is BOM-only: the 22 bare copper test pads have no MPN, which is expected unless you want assembled test-point hardware.
Project files:
Exports:
Suggested next steps:
  1. Open the Gerber ZIP in JLCPCB/PCBWay viewer and visually confirm board outline, drills, silk, and connector pin-1 marks.
  2. Verify CPL rotations for the two FFC connectors before assembly order.
  3. Continuity-check one FFC cable/wing prototype against the connector-orientation note before powering.
Review exports and BOM
Check Gerber visuals
Verify CPL rotations
Clean BOM caveats
Create bring-up checklist

TP_B
TP_LY
JRIGHT
TP_R2
TP_RX
TP_GND
TP_A
TP_START
TP_X
TP_L3
TP_RY
TP_DPAD_LEFT
TP_DPAD_UP
TP_SELECT
TP_R3
TP_DPAD_RIGHT
TP_L2
TP_LX
TP_3V3
TP_Y
TP_R1
TP_L1
JLEFT
TP_DPAD_DOWN
H1
H4
H2
U1
H3

No SVG symbol available for this part

RP2040-Zero Controller Carrier thumbnail