Data Logger
Thought for 4 sec
I’ll finish the remaining schematic wiring, verify the design, and update the key project docs with any open risks or bring-up notes.
Worked for 9 mins 35 sec
Finished the schematic phase: USB-C, CAN/OBD2, RTC/I2C, microSD, UART, ADC, buttons, LED, power, and no-connect handling are wired, and the checked ERC categories are clean.
Created docs:
Open items before layout/manufacturing:
- Verify OBD2 connector mechanical gender/fit.
- Review 3.3 V LDO thermals under ESP32 + microSD + WiFi load.
- Replace/approve the provisional P-channel MOSFET with an automotive-qualified part if robustness matters.
Suggested next steps:
- Set board size, stackup, and layout rules.
- Place components with automotive/USB/CAN/antenna constraints.
- Route the PCB and clear DRC/airwires.
Layout and fixes
Start PCB layout
Verify OBD2 fit
Review LDO thermals
Replace MOSFET
Refine this doc
Ask about this doc
Board Bring-Up Plan — ESP32-S3 OBD2 Data Logger
Prerequisites
- Bench supply with current limit, multimeter, oscilloscope if available, USB-C cable, CAN/OBD2 test source, microSD card.
- Start with current limit ≤100 mA for first power-on, then raise after rails are verified.
Power Rail Verification
Table
| Rail | Source | Expected | Measure At | Pass Criteria |
|---|---|---|---|---|
| VBAT_RAW | J1 pin 16 through F1 | 12–24 V vehicle input | J1/F1 | No short to GND before power |
| VBAT_FUSED | F1 → SW1 | 12–24 V when switch on | F1/SW1 | Tracks input |
| VEHICLE_PROTECTED / VIN_FILTERED | Q1 + TVS/filter | input minus MOSFET drop | D1/L2/U2 VIN | Stable, no excessive current |
| 5V | U2 LMR50410 buck | 5.0 V | U2 output / C4/C5/C6 | 4.75–5.25 V |
| 3V3 | U3 AMS1117-3.3 | 3.3 V | U3 output / U1 3V3 | 3.20–3.40 V |
Critical Signals
Table
| Signal | Expected Idle | Notes |
|---|---|---|
| ESP_EN | High | R7 pull-up, C9 delay, SW2 reset to GND |
| BOOT_IO0 | High | R8 pull-up, SW3 pulls low for bootloader |
| CAN_STB | Firmware driven low for normal mode | R5 pull-up keeps transceiver standby by default |
| I2C_SDA/SCL | High | R9/R10 4.7k pull-ups to 3V3 |
| USB_D_N_MCU / USB_D_P_MCU | USB activity after enumeration | Routed through R16/R17 and U6 ESD |
Interface Tests
Table
| Interface | Connector/Parts | Test |
|---|---|---|
| USB-C | J2, U6, R3/R4/R16/R17 | Confirm host sees ESP32-S3 bootloader/serial device |
| CAN/OBD2 | J1, U4, D3, R15 | Verify 500 kbps CAN receive from known OBD2/CAN source |
| microSD | J3, R18/R19/R20 | Mount card and write /canlog.csv |
| RTC/I2C | U5, J4 | I2C scan should find DS3231 at 0x68 |
| UART expansion | J5 | Loopback TX/RX or connect serial adapter at 3.3 V logic |
| ADC expansion | J6 | Apply 0–3.3 V only; confirm ADC readings on GPIO1/GPIO2 |
First Power-On Sequence
- With no USB and no vehicle input, measure resistance from 5V and 3V3 to GND.
- Apply 12 V to OBD2 power path with 100 mA current limit and SW1 off; confirm no unexpected current.
- Turn SW1 on; verify 5V then 3V3.
- Increase current limit to expected operating range and check U2/U3 temperature.
- Connect USB-C and flash starter firmware.
- Insert microSD, verify RTC I2C, then test CAN receive/logging.
Open Bring-Up Risks
- U3 linear 5V→3.3V dissipation must be checked thermally under WiFi + microSD load.
- Q1 P-channel MOSFET is provisional; final part should be automotive-qualified with appropriate voltage/current/RDS(on).
- OBD2 connector mechanical gender and fit must be verified before PCB layout/manufacturing.
Prerequisites
Power Rail Verification
Critical Signals
Interface Tests
First Power-On Sequence
Open Bring-Up Risks
