Wired the fixed firmware mapping exactly: GPIO35/36/37 to status LEDs, GPIO39 to user button, GPIO9/10/11 to the INMP441 header, and GPIO4/5/6 to the MAX98357A I2S interface.
Implemented USB-C sink power entry with 2 x 5.1 kOhm CC pull-downs, native USB D+/D- to the ESP32-S3 through U2, polyfuse protection, separate VBUS_5V and 3V3 rails, EN/IO0 boot circuitry, UART header, and bring-up test points TP1-TP5.
Renamed the project, updated project metadata, and saved the system architecture diagram as a project property for traceability.
Set the layout to an 80 mm x 100 mm rectangular board with 3 mm corner radius, 4-layer stackup, and conservative board keepout margin.
Success criteria review
✅ Confirmed use of the required U1 and included the specified power-entry, audio, debug, button, LED, and test-point features.
✅ Preserved the required firmware GPIO mapping and documented it in project metadata and the implemented schematic connectivity.
✅ Documented and applied PCB-level constraints for a 4-layer first revision with an intentionally roomy board size suitable for bring-up.
✅ Defined validation checkpoints through review passes and corrected the major schematic issue found during implementation: the unintended VBUS_5V / 3V3 short.
✅ Captured the architecture and requirements traceability in project properties for future review.
❌ Net-specific PCB rules for USB/power classes could not be attached through selector-based layout-rule targeting in this pass, so antenna keepout and per-net routing constraints remain documented but not yet encoded as custom layout rules.
Next steps
The schematic foundation and first-pass board constraints are in place. The next high-value step is to finish PCB-specific constraints by encoding the ESP32 antenna keepout and then placing U1 at the board edge with the USB connector and headers arranged for bring-up. I can do that next.
Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
Wirelessly connects power nets on schematic. Identical to the net portal, but with a power symbol. Used to organize schematics and separate functional blocks. To wirelessly connect power net portals, give them the same designator. #portal #power