Part Information Review and Verification

flux

  • Set EN/UVLO_1's Pin Type to "Input"
  • Set EN/UVLO_1's Pin Description to "Enable UVLO input"
  • Set EN/UVLO_1's Section to "Control"
  • Set EN/UVLO_1's Pin Group to "Enable_UVLO"
  • Set EN/UVLO_1's Pin Orientation to "Left"
  • Set EN/OVLO's Pin Type to "Input"
  • Set EN/OVLO's Pin Description to "Enable OVLO input"
  • Set EN/OVLO's Section to "Control"
  • Set EN/OVLO's Pin Group to "Enable_OVLO"
  • Set EN/OVLO's Pin Orientation to "Left"
  • Set PG's Pin Type to "Open Collector"
  • Set PG's Pin Description to "Power-good output"
  • Set PG's Section to "Status"
  • Set PG's Pin Group to "Status"
  • Set PG's Pin Orientation to "Right"
  • Set ~FLT_1's Pin Type to "Open Collector"
  • Set ~FLT_1's Pin Description to "Fault indicator output"
  • Set ~FLT_1's Section to "Status"
  • Set ~FLT_1's Pin Group to "Status"
  • Set ~FLT_1's Pin Orientation to "Right"
  • Set IN's Pin Type to "Power In"
  • Set IN's Pin Description to "Power input"
  • Set IN's Section to "Power"
  • Set IN's Pin Group to "Power_Input"
  • Set IN's Pin Orientation to "Top"
  • Set OUT's Pin Type to "Power Out"
  • Set OUT's Pin Description to "Protected power output"
  • Set OUT's Section to "Power"
  • Set OUT's Pin Group to "Power_Output"
  • Set OUT's Pin Orientation to "Right"
  • Set DVDT_1's Pin Type to "Passive"
  • Set DVDT_1's Pin Description to "Slew-rate capacitor"
  • Set DVDT_1's Section to "Configuration"
  • Set DVDT_1's Pin Group to "Slew_Rate"
  • Set DVDT_1's Pin Orientation to "Left"
  • Set GND's Pin Type to "Ground"
  • Set GND's Pin Description to "Ground reference"
  • Set GND's Section to "Ground"
  • Set GND's Pin Group to "Ground"
  • Set GND's Pin Orientation to "Bottom"
  • Set ILM's Pin Type to "Output"
  • Set ILM's Pin Description to "Current-limit monitor"
  • Set ILM's Section to "Monitor_Configuration"
  • Set ILM's Pin Group to "Current_Limit_Monitor"
  • Set ILM's Pin Orientation to "Right"
  • Set ITIMER_1's Pin Type to "Passive"
  • Set ITIMER_1's Pin Description to "Blanking timer capacitor"
  • Set ITIMER_1's Section to "Configuration"
  • Set ITIMER_1's Pin Group to "Timer"
  • Set ITIMER_1's Pin Orientation to "Left"

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TPS259814ARPWR Part Review
Scope
Reviewed current project metadata, schematic terminal elements, footprint pad list, and available official TI information for TPS259814ARPWR.
Datasheet status
  • Existing Datasheet URL property is set: https://www.ti.com/lit/gpn/tps25981
  • Official TI datasheet URL found: https://www.ti.com/lit/ds/symlink/tps25981.pdf
  • Because a datasheet URL is already set, I did not update the project property.
Current project metadata
  • Project name: TPS259814ARPWR
  • Manufacturer Name: Texas Instruments
  • Manufacturer Part Number: TPS259814ARPWR
  • Description: 2.7-V to 16-V, 10-A, 6-m eFuse with transient overcurrent blanking timer
  • Designator Prefix: IC
  • Package or Case Code: TO
  • Assets:
    • 3D model: TPS259814ARPWR.stp
    • Footprint asset: TPS259474LRPWR.kicad_mod
    • Symbol asset: TPS259814ARPWR Symbol.svg
Official TI information found
  • Device family: TPS25981x eFuse
  • Orderable MPN: TPS259814ARPWR
  • Description: 2.7-V to 16-V, 10-A, 6-mΩ eFuse with transient overcurrent blanking timer
  • Package: VQFN-HR, package code/drawing RPW, 10 pins
  • Official TI part page reports package RPW, 10 pins, ACTIVE status.
Current schematic symbol / terminals
The project currently contains 14 terminal components:

Table

Current terminalPin numberCurrent pin type
EN/UVLO_11Unspecified
EN/OVLO2Unspecified
PG3Unspecified
~FLT_14Unspecified
IN5Unspecified
OUT6Unspecified
DVDT_17Unspecified
GND8Unspecified
ILM9Unspecified
ITIMER_110Unspecified
EN/UVLO_211Unspecified
~FLT_212Unspecified
DVDT_213Unspecified
ITIMER_214Unspecified
Datasheet pinout expected for TPS259814ARPWR / RPW 10-pin

Table

Datasheet pinNameRecommended Flux pin typeShort description
1EN/UVLOInputEnable / UVLO input
2EN/OVLOInputEnable / OVLO input
3PGOutputPower-good open-drain output
4FLTOutputFault open-drain output
5INPower InPower input
6OUTPower OutPower output
7DVDTPassiveSlew-rate capacitor pin
8GNDGroundGround reference
9ILMPassiveCurrent limit / monitor
10ITIMERPassiveOvercurrent timer capacitor
Footprint review
The layout currently contains pads matching the 14 schematic terminals: pins/pads for EN/UVLO_1, ~EN~/OVLO, PG, ~FLT_1, IN, OUT, DVDT_1, GND, ILM, ITIMER_1, plus duplicated EN/UVLO_2, ~FLT_2, DVDT_2, and ITIMER_2.
The footprint asset name is TPS259474LRPWR.kicad_mod, which appears to be for a different MPN family and should be treated as suspicious unless intentionally shared and verified against the TI RPW0010A package drawing.
Mismatches / issues flagged
  1. Pin count mismatch — critical
    • Project has 14 terminals/pads.
    • Official TI information for TPS259814ARPWR indicates 10 pins in RPW/VQFN-HR.
    • Extra project pins: 11 EN/UVLO_2, 12 ~FLT_2, 13 DVDT_2, 14 ITIMER_2.
  2. Package mismatch — critical
    • Project property Package or Case Code is TO, which does not match official RPW / VQFN-HR 10-pin package.
  3. Footprint asset mismatch — critical
    • Current footprint asset is named TPS259474LRPWR.kicad_mod, not TPS259814ARPWR.
    • The current layout exposes 14 pads, inconsistent with the official 10-pin RPW package.
  4. Pin naming mismatch — moderate
    • Pin 2 is shown as ~EN~/OVLO; expected datasheet naming is EN/OVLO or equivalent active-low enable/OVLO notation.
    • Pin 4 ~FLT_1 should map to FLT / active-low fault output. The suffix _1 suggests duplicated imported pins.
    • Pins 7 and 10 have _1 suffixes, again suggesting duplicate import artifacts.
  5. Missing pin metadata — moderate
    • All 14 terminals currently have Pin Type: Unspecified.
    • Pin descriptions, sections, pin groups, and orientations are not populated.
  6. Description typo — low
    • Project description says 6-m eFuse; this should likely be 6-mΩ eFuse.
  • Replace or correct the symbol to exactly 10 terminals for TPS259814ARPWR RPW package.
  • Remove or flag the extra pins 11–14 after confirmation.
  • Replace/verify the footprint against TI RPW0010A / 10-pin VQFN-HR mechanical drawing.
  • Update Package or Case Code from TO to RPW0010A or VQFN-HR-10 (RPW).
  • Update pin types and descriptions per the expected pinout table above.
  • Consider updating Designator Prefix from IC to U, unless your library convention intentionally uses IC.
  • Correct the description to include 6-mΩ.

  • Scope

  • Datasheet status

  • Current project metadata

  • Official TI information found

  • Current schematic symbol / terminals

  • Datasheet pinout expected for TPS259814ARPWR / RPW 10-pin

  • Footprint review

  • Mismatches / issues flagged

  • Recommended fixes

Documents

Assets

stp

TPS259814ARPWR

TPS259814ARPWR.stp3D Model
kicad_mod

TPS259814ARPWR

TPS259474LRPWR.kicad_modFootprint
TPS259814ARPWR-thumb.png

TPS259814ARPWR-thumb.png

TPS259814ARPWR-thumbThumbnail
TPS259814ARPWR

TPS259814ARPWR

TPS259814ARPWR Symbol.svgDefault

TPS259814ARPWR

TPS259814ARPWR thumbnail
Electronic Fuse Regulator High-Side 10A 10-VQFN-HR (2x2)
The TPS25981xx family of eFuses is a highly integrated circuit protection and power management solution in a small package. The devices provide multiple protection modes using very few external components and are a robust defense against overloads, short circuits, voltage surges and excessive inrush current. Output slew rate and inrush current can be adjusted using a single external capacitor. Loads are protected from input overvoltage conditions by cutting off the output if input exceeds an adjustable overvoltage threshold. The devices respond to output overload by actively limiting the current (during startup) or breaking the circuit (during steady-state). The overcurrent protection threshold as well as the transient overcurrent blanking timer are useradjustable. The current limit control pin also functions as an analog load current monitor. The devices are available in a 2-mm × 2-mm, 10- pin HotRod™ QFN package for improved thermal performance and reduced system footprint. The devices are characterized for operation over a junction temperature range of –40°C to +125°C.
• Wide operating input voltage range: 2.7 V to 16 V – 20-V absolute maximum • Integrated FET with low on-resistance: RON = 6 mΩ (typ.) • Fast overvoltage protection – Adjustable overvoltage lockout (OVLO) with 1.2-μs (typ.) response time • Overcurrent protection with load current monitor output (ILM) – Circuit-breaker response – Adjustable threshold (ILIM) 1.5 A – 11 A • ±10% accuracy for ILIM > 5 A – Adjustable transient blanking timer (ITIMER) to allow peak currents up to 2 × ILIM – Output load current monitor accuracy: ±10% (IOUT ≥ 3 A) • Fast-trip response for short-circuit protection – 640-ns (typ.) response time – Adjustable (2 × ILIM) and fixed thresholds • Active high enable input with adjustable undervoltage lockout threshold (UVLO) • Active low enable input with adjustable undervoltage lockout threshold (OVLO) • Adjustable output slew rate control (dVdt) • Option to drive external FET for reverse current blocking in disabled/OFF state • Overtemperature protection • Quick Output Discharge • Digital outputs – Power Good (PG) and fault indication (FLT) • UL 2367 recognition (pending) • IEC 62368 CB certification (pending) • Small footprint: QFN 2-mm × 2-mm, 0.45-mm pitch
#CommonPartsLibrary #IntegratedCircuit #PowerManagement

Properties

TPS259814ARPWR

Texas Instruments

Integrated Circuit

ti.com/lit/gpn/tps25981

IC

TO

creativecommons.org/licenses/by/4.0/

parametric-v1

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