Part Metadata Audit and Verification

Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.
I’ll audit the TLV9024PWR part metadata, find and attach the official datasheet if needed, then verify symbol/footprint/pins against the datasheet and summarize any discrepancies.
I found the official TI datasheet and confirmed this is a 14-pin PW/TSSOP open-drain quad comparator. I’m updating the available metadata/pin descriptions now, then I’ll write the audit report.
Audit complete. I found the official TI datasheet, recorded it in the project implementation details, updated all terminal pin descriptions/types, and verified the 14-pin symbol plus TSSOP/PW footprint against the datasheet with no pinout or footprint mismatches found.
Key specs: TLV9024PWR is a TI active-production quad open-drain comparator, 1.65–5.5 V supply, ±0.3 mV typical offset, 100 ns typical propagation delay, 16 µA/channel typical IQ, -40°C to +125°C. Full details are in TLV9024PWR Part Audit.
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TLV9024PWR Part Audit
Source Reviewed
Existing Project State Before Audit
  • Symbol terminals present: 14
  • Nets: none (expected for a standalone part project)
  • BOM entries: none (expected for a part project)
  • Existing terminal pin types were Unspecified; these were updated during the audit.
  • Project-level implementation notes were updated with the official datasheet URL and key part metadata.
Datasheet Identity and Package

Table


FieldDatasheet ValueProject Check
MPNTLV9024PWRMatches project name
DescriptionHigh-performance quad low-voltage open-drain comparatorMatches project description
ManufacturerTexas InstrumentsConfirmed from TI datasheet/product page
Package optionPWFootprint uses TSSOP/PW style
Package nameTSSOPFootprint asset SOP65P640X120-14N.kicad_mod is compatible
Pin count14Matches 14 schematic terminals and 14 footprint pads
Body size4.40 mm x 5.00 mm nominal family listing; PW0014A mechanical drawingFootprint fab body is 4.4 mm x 5.0 mm
Pitch0.65 mmFootprint pad pitch is 0.65 mm
Recommended pad size0.45 mm x 1.5 mmFootprint pads are 0.45 mm x 1.475 mm; acceptable close match
Operating temperature-40°C to +125°CProject property updated
Pin Cross-Check

Table


PinDatasheet NameDatasheet FunctionProject TerminalResult
1OUT2Output pin of comparator 2OUT2Match
2OUT1Output pin of comparator 1OUT1Match
3V+Positive supplyV+Match
4IN1-Negative input pin of comparator 1IN1-Match
5IN1+Positive input pin of comparator 1IN1+Match
6IN2-Negative input pin of comparator 2IN2-Match
7IN2+Positive input pin of comparator 2IN2+Match
8IN3-Negative input pin of comparator 3IN3-Match
9IN3+Positive input pin of comparator 3IN3+Match
10IN4-Negative input pin of comparator 4IN4-Match
11IN4+Positive input pin of comparator 4IN4+Match
12V-Negative supplyV-Match
13OUT4Output pin of comparator 4OUT4Match
14OUT3Output pin of comparator 3OUT3Match
Key Electrical Specifications

Table


SpecDatasheet Value
Comparator channels4
Output typeOpen-drain for TLV902x family
Supply voltage, recommended1.65 V to 5.5 V
Supply voltage, absolute max-0.3 V to 6 V across V+ to V-
Input voltage, recommendedV- - 0.2 V to 5.7 V
Input common-mode rangeV- - 0.2 V to V+ + 0.2 V over temperature
Input fault toleranceInputs can go to 6 V without damage, subject to absolute-max/current limits
Input offset voltage±0.3 mV typical, ±1.5 mV max at 25°C
Input offset drift±0.5 µV/°C typical
Input bias current5 pA typical
Quiescent current16 µA typical per comparator, 30 µA max at 25°C; 35 µA max over temperature
Propagation delay100 ns typical high-to-low, 150 ns typical low-to-high with stated test conditions
Output low voltage75 mV typical / 125 mV max at ISINK = 4 mA and 25°C; 175 mV max over temperature
Open-drain output leakage100 pA typical at 25°C
Ambient operating temperature-40°C to +125°C
Footprint Cross-Check
The footprint asset is SOP65P640X120-14N.kicad_mod, described as PW (R-PDSO-G14). It has:
  • 14 SMD rectangular pads
  • 0.65 mm pitch
  • Pad size 0.45 mm x 1.475 mm
  • Fab body 4.4 mm x 5.0 mm
  • Pin-1 chamfer and silk pin-1 indicator
This is consistent with the TI PW0014A TSSOP 14-pin package and the TI example board layout, which lists 14 pads of 0.45 mm x 1.5 mm at 0.65 mm pitch.
Symbol Cross-Check
The schematic symbol has one terminal per package pin. The terminal numbering and names match the datasheet pin function table for the 14-pin TLV9024 SOIC/TSSOP/SOT-23 package.
Terminal pin descriptions and pin types were updated to match the datasheet:
  • Inputs set to Input
  • Outputs set to Output and described as open-drain
  • V+ set to Power In
  • V- set to Ground
Mismatches / Issues Found
  1. Datasheet URL was not visible in the inspected schematic/BOM metadata.
    • Action taken: Added the official TI datasheet URL to project-level implementation details because this is a part project with terminals rather than a normal schematic IC instance.
  2. Terminal pin types were initially Unspecified.
    • Action taken: Updated all terminal pin types and pin descriptions to match the datasheet.
  3. No BOM item exists.
    • This appears normal for a standalone part project, but it means MPN/manufacturer/package metadata is not represented as a BOM line item in the current schematic view.
  4. No exact Datasheet URL component property was available on a single IC component instance.
    • Because the project is modeled as a part project with individual terminals, not as a schematic containing one TLV9024PWR component, the datasheet URL was recorded at project level instead.
Conclusion
The schematic terminal names, pin numbers, symbol terminal count, and footprint geometry are consistent with the Texas Instruments TLV9024PWR datasheet. The main issues found were metadata completeness issues, not pinout or footprint mismatches. Pin descriptions and pin electrical types have been corrected.

    Source Reviewed

    Existing Project State Before Audit

    Datasheet Identity and Package

    Pin Cross-Check

    Key Electrical Specifications

    Footprint Cross-Check

    Symbol Cross-Check

    Mismatches / Issues Found

    Conclusion

Documents

    TLV9024PWR Part Audit

Assets

TLV9024PWR-thumb.png

TLV9024PWR-thumb.png

TLV9024PWR-thumbThumbnail
kicad_mod

TLV9024PWR

SOP65P640X120-14N.kicad_modFootprint
TLV9024PWR

TLV9024PWR

TLV9024PWR Symbol.svgDefault
stp

TLV9024PWR

TLV9024PWR.stp3D Model

TLV9024PWR

TLV9024PWR thumbnail
Comparator Standard (General Purpose) Open-Drain, Rail-to-Rail 14-TSSOP
The TLV902x have an open-drain output that can be pulled-up below or beyond the supply voltage. These devices are designed for low voltage logic translators. The TLV903x have a push-pull output stage capable of sinking and sourcing many milliamps of current to drive LEDs or capacitive loads for MOSFET gates. The TLV90x0 and TLV90x1 are alternate pinouts of the single device. The family is specified for the Industrial temperature range of -40°C to +125°C and are available in a standard leaded and leadless packages.
• Supply range: 1.65V to 5.5V • Precision input offset voltage: 300μV • Rail-to-Rail input with fault-tolerance • Typical propagation delay: 100ns • Low quiescent current per channel: 16μA • Low input bias current: 5pA • Open-drain output option (TLV902x) • Push-pull output option (TLV903x) • Full temperature range: -40°C to +125°C • ESD protection: 2kV • Alternate Single Pinout (TLV90x0)

Properties

TLV9024PWR

MPN TLV9024PWR by Texas Instruments. Official datasheet: https://www.ti.com/lit/ds/symlink/tlv9022.pdf . High-performance quad low-voltage open-drain comparator in 14-pin PW/TSSOP package; supply range 1.65 V to 5.5 V; open-drain outputs require external pull-ups in application circuits.

-40°C to +125°C

1.65

V

Texas Instruments

Integrated Circuit

IC

parametric-v1

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