Part Data Review and Verification
Worked for 2 mins 44 sec
Completed the part review and created Part Verification Report. The existing Datasheet URL was already set, pinout and SO-8 footprint matched the Vishay datasheet, and the only cleanup items found were unspecified terminal pin types/descriptions plus a minor MPN separator difference (
_ vs -).Suggested next steps:
- Set explicit Source/Gate/Drain pin descriptions and pin types.
- Normalize the MPN to the manufacturer ordering format if desired.
- Add key electrical specs as searchable part properties.
Set explicit Source, Gate, and Drain pin descriptions and electrical pin types.
Thought for 9 sec
I’ll update the eight terminal properties so each pin has an explicit Source/Gate/Drain description and an appropriate MOSFET electrical pin type, then verify the schematic properties.
Worked for 29 sec
Updated and verified all eight terminal properties.
- Pins 1–3: Source terminal, Pin Type Passive
- Pin 4: Gate control input, Pin Type Input
- Pins 5–8: Drain terminal, Pin Type Passive
No open items.
Finalize part library
Add specs properties
Normalize MPN
Run consistency check
Export part package
Refine this doc
Ask about this doc
Part Verification Report: SQ4435EY-T1_GE3
Reviewed project information
- Project/part: SQ4435EY-T1_GE3
- Manufacturer: Vishay
- Description: MOSFET P-Channel 30V AEC-Q101 Qualified
- Part type: Transistors
- Designator prefix: Q
- Pin/pad count: 8
- Datasheet URL property: 05113df3183a01482a42eec4612192362c966fd5cebebb128490c8ca1b758f63.pdf
Datasheet identity and key specs
The existing Datasheet URL was already populated, so no property update was required. The datasheet identifies the device as Vishay Siliconix SQ4435EY, automotive P-channel 30 V (D-S), 175 °C MOSFET, AEC-Q101 qualified, TrenchFET power MOSFET, RoHS compliant, halogen-free.
Key electrical specifications from the datasheet:
Table
| Parameter | Datasheet value |
|---|---|
| Configuration | Single P-channel MOSFET |
| Package | SO-8 / SOIC narrow, JEDEC MS-012 |
| VDS | -30 V |
| VGS max | ±20 V |
| Continuous drain current, TC=25 °C | -15 A |
| Continuous drain current, TC=125 °C | -8.7 A |
| Pulsed drain current | -60 A |
| RDS(on), VGS=-10 V, ID=-8 A | 13 mΩ typ, 18 mΩ max |
| RDS(on), VGS=-4.5 V, ID=-6 A | 23 mΩ typ, 31 mΩ max |
| VGS(th), ID=-250 µA | -1.5 V min, -2.0 V typ, -2.5 V max |
| Power dissipation, TC=25 °C | 6.8 W |
| TJ/Tstg | -55 °C to +175 °C |
| RθJA, PCB mount | 85 °C/W |
| RθJF, junction-to-foot drain | 22 °C/W |
Pinout cross-check
Datasheet SO-8 top-view pinout:
Table
| Pin | Datasheet function | Symbol terminal found | Result |
|---|---|---|---|
| 1 | Source | S_1 | Match |
| 2 | Source | S_2 | Match |
| 3 | Source | S_3 | Match |
| 4 | Gate | G | Match |
| 5 | Drain | D_1 | Match |
| 6 | Drain | D_2 | Match |
| 7 | Drain | D_3 | Match |
| 8 | Drain | D_4 | Match |
Footprint/package cross-check
The footprint has eight SMD pads and SO-8 style silk/fab geometry with pin-1 indicator. The visible body/silk dimensions are consistent with narrow SOIC-8 style geometry, and the datasheet package is SO-8 / SOIC narrow, JEDEC MS-012. No footprint pad numbering mismatch was found from the available layout data.
Mismatches / cleanup items
- No critical pinout mismatch found.
- No critical footprint/package mismatch found.
- Datasheet URL was already set; no update was needed.
- Symbol terminal descriptions are implicit in the terminal designators (S_1, S_2, S_3, G, D_1, D_2, D_3, D_4), but each terminal's Pin Type property is still set to
Unspecified. For better library quality, set Source/Drain/Gate pin descriptions and electrical pin types explicitly. - MPN formatting differs slightly: project uses
SQ4435EY-T1_GE3, while datasheet ordering line showsSQ4435EY-T1-GE3. This appears to be separator formatting rather than a functional mismatch, but distributor/manufacturer ordering should be checked if exact orderability matters.
Reviewed project information
Datasheet identity and key specs
Pinout cross-check
Footprint/package cross-check
Mismatches / cleanup items
