Part Datasheet Review
Thought for 1 min 33 sec
Part Review Completed
1) Available part information
2) Datasheet URL check
4) Absolute maximum ratings
5) Recommended operating conditions
6) Pin descriptions
7) Package dimensions
Cross-check: symbol and footprint vs datasheet
Good matches
Issues and risk flags
Manufacturing / ordering / board-failure assessment
Bottom line
Table
| Field | Result |
|---|---|
| MPN | SLG59H1403C |
| Manufacturer | Renesas |
| Description | High voltage GreenFET load switch for ORing or manual power MUX applications |
| Functional summary | Two 3 A load switches with a common output, automatic source selection, manual rail select, reverse-current blocking, current limit, OV protection, soft start, thermal shutdown |
| Package | WLCSP-20L |
| Package size | 1.585 mm x 1.985 mm |
| Pitch | 0.4 mm |
| Nominal height | 0.47 mm |
| Pin count | 20 |
| Footprint asset present | Yes: BGA20C40P4X5_158X198X50.kicad_mod |
| 3D model present | Yes: SLG59H1403C.stp |
| Datasheet property status | Present, but it points to the Renesas product page rather than the direct PDF |
| Official datasheet PDF found | SLG59H1403 Datasheet |
A datasheet URL is already set on this part, so step 2 did not require a property update.
3) Datasheet metadata summary
Table
| Category | Extracted data |
|---|---|
| Operating input voltage | 2.8 V to 22 V on VIN1/VIN2 |
| UVLO threshold | Rising: 2.5 / 2.65 / 2.8 V min/typ/max; Falling: 2.4 / 2.55 / 2.7 V min/typ/max |
| Continuous load current | 3 A |
| Peak current | 3.5 A max, for no more than 10 continuous seconds out of every 100 seconds |
| Quiescent current | 300 µA typ, 400 µA max |
| Standby current | 15 µA typ, 25 µA max |
| Leakage current | Up to ±35 µA depending on condition and temperature |
| RDS(ON) | 52 mΩ typ, 75 mΩ max at 25 °C; 90 mΩ max over -40 °C to 85 °C |
| Reverse-current blocking detect threshold | 0.1 / 0.5 / 2 A min/typ/max |
| Reverse-current blocking response time | 10 µs typ |
| Switchover time | 100 µs typ |
| Current limit options | With 31.6 kΩ: 3.0 / 3.5 / 4.0 A; with 46.4 kΩ: 2.0 / 2.5 / 3.0 A; with 85 kΩ: 1.0 / 1.5 / 2.0 A; with < 1 kΩ: 1.5 / 2.5 / 3.5 A |
| Current limit response time | 250 µs typ |
| Thermal shutdown | On at 160 °C typ, off at 140 °C typ, shutdown time 1 ms max |
| Control/reference threshold | 1.02 / 1.06 / 1.10 V rising, 1.00 / 1.04 / 1.08 V falling |
| ST pull-up recommendation | 6 kΩ to 20 kΩ |
| Temperature range | -40 °C to 85 °C |
| ESD | HBM 2000 V, CDM 500 V |
Table
| Parameter | Rating |
|---|---|
| VIN1, VIN2 | -0.3 V to 24 V |
| VOUT | -0.3 V to 24 V |
| OV1, OV2 | -0.3 V to 6 V |
| PR, SEL | -0.3 V to 6 V |
| ST | -0.3 V to 6 V |
| Storage temperature | -65 °C to 150 °C |
| Peak drain-source current | 3.5 A max under stated duty condition |
Table
| Parameter | Condition |
|---|---|
| VIN1, VIN2 | 2.8 V to 22 V |
| PR, SEL | 0 V to 5.5 V |
| ST | 0 V to 5.5 V |
| OV1, OV2 | 0 V to 5.5 V |
| Ambient temperature | -40 °C to 85 °C |
Table
| Pin(s) | Function | Datasheet description |
|---|---|---|
| A1 | PR | Analog input that sets priority to Channel 1; compare to VREF; connect to GND if unused |
| A2 | OV1 | Overvoltage sense for Channel 1 using external divider; turns off Channel 1 when VOV1 ≥ VREF |
| A3 | OV2 | Overvoltage sense for Channel 2 using external divider; turns off Channel 2 when VOV2 ≥ VREF |
| A4 | SEL | Manual select input to override priority and select IN2; connect to GND if unused |
| B1, B2, C1 | IN1 | Channel 1 power input |
| B3, B4, C4 | IN2 | Channel 2 power input |
| C2, C3, D1, D2, D3, D4 | OUT | Common output |
| E1 | ST | Open-drain, active LOW status output |
| E2 | ILIM | External resistor to GND sets active current limit for both channels |
| E3 | SS | External ceramic capacitor to GND sets slew rate and turn-on time |
| E4 | GND | Ground |
Table
| Item | Value |
|---|---|
| Package | 20 Lead WLCSP |
| Body size | 1.985 mm x 1.585 mm |
| Height | 0.47 mm nominal |
| Ball pitch | 0.4 mm |
| Tape and reel option | SLG59H1403CTR |
| Carrier orientation note | Pin 1 at upper-left corner in carrier orientation |
Table
| Check | Result |
|---|---|
| Pin count | Match: symbol/footprint have 20 pads/pins |
| Package family | Match: footprint is clearly a 20-ball WLCSP/BGA-style land pattern |
| Body size naming | Match: footprint asset name encodes roughly 1.58 mm x 1.98 mm |
| Pitch | Match: footprint uses 0.4 mm grid, matching datasheet |
| Pin numbering | Match: A1-A4, B1-B4, C1-C4, D1-D4, E1-E4 all present |
| Functional pad mapping | Match: IN1, IN2, OUT, PR, OV1, OV2, SEL, ST, ILIM, SS, GND all align with datasheet assignment |
| 3D model presence | Present, good for mechanical validation |
Table
| Severity | Finding | Why it matters |
|---|---|---|
| Medium | The part property labeled as datasheet points to the Renesas product page, not the direct PDF | Can slow part review, automation, and downstream verification because the canonical datasheet document is indirect |
| Medium | All symbol terminals are typed as Unspecified instead of Input / Output / Power / Ground | This weakens ERC quality and can hide connection mistakes in future designs using this part |
| Low | The schematic part project currently has no nets defined | Not a footprint error, but it means there is no electrical self-check inside the part project beyond pin presence/mapping |
| Low | The symbol exposes duplicated power balls as separate named terminals rather than merged functional pins | Electrically valid for a part project, but users must understand that multiple balls belong to the same net class in the final design |
Table
| Area | Assessment |
|---|---|
| Wrong pin count risk | No obvious issue found |
| Wrong package risk | No obvious issue found |
| Wrong pin mapping risk | No obvious issue found |
| Footprint pitch/body mismatch risk | No obvious issue found |
| Symbol ERC quality risk | Yes, moderate due to unspecified pin types |
| Datasheet traceability risk | Yes, moderate because the saved datasheet link is not the direct PDF |
- The symbol-to-datasheet pin mapping looks correct.
- The footprint appears consistent with a 20-pin, 0.4 mm pitch, 1.585 mm x 1.985 mm WLCSP package.
- I do not see a clear mismatch that would obviously cause assembly failure or incorrect ordering.
- The two cleanup items I would prioritize are:
- change the datasheet property to the direct PDF: SLG59H1403 Datasheet
- assign correct electrical pin types to the symbol terminals for stronger ERC
If you want, I can next turn this into a concise pass/fail checklist for publishing the part.
Publish checklist
Fix pin types
Export review notes
