Part Review and Datasheet Verification

Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.

Thought for 4 sec

flux

I’ll review the part metadata, find and set the official datasheet URL if missing, then cross-check symbol, footprint, and pin descriptions against the datasheet and report mismatches.

Worked for 4 mins 1 sec

flux

Reviewed the part against the TI datasheet already attached in the Datasheet URL property; no datasheet update was needed.

Key result: the 8-ball DSBGA symbol pin mapping matches the datasheet, but I flagged issues with VSS being typed as Power Out, the X experimental-silicon MPN status, sparse pin descriptions, and possible footprint pad-size/unit ambiguity versus TI’s 0.35 mm pitch / 0.18 mm land pattern guidance.

Full report: part-review-xmsm0c1104s8ycjr

Fix part issues

Fix VSS type

Add pin descriptions

Verify footprint geometry

Run ERC/DRC

Files

Pins

Symbol

Layout

Preview

Part Review: XMSM0C1104S8YCJR

Reviewed project metadata

Manufacturer part number: XMSM0C1104S8YCJR
Manufacturer: Texas Instruments
Project description: XMSM0C1104S8YCJR; DSBGA_YCJ0008-C01_TEX / DSBGA_YCJ0008-C01_TEX-M / DSBGA_YCJ0008-C01_TEX-L
Published Flux part UID: 0af97309-744a-460e-88d2-b285ef5f180f
Pin / pad count: 8
Designator prefix: U
Datasheet URL property: https://storage.googleapis.com/graviton-electric-symbols/document_assets/user-uploaded/dc96e7827a29fd535061f297109844be9f215f270f1363911b6760371123932c.pdf

A datasheet URL was already present, so I did not replace it. The attached document appears to be the TI MSPM0C1104/MSPM0C1103 datasheet, revision SLASF90D, revised January 2026.

Key datasheet specs

Device family: MSPM0C110x mixed-signal microcontroller
Status/nomenclature note: X prefix indicates experimental silicon; TI recommends qualified production MSP devices for production systems.
Core: Arm Cortex-M0+, up to 24 MHz
Memory for C1104 variant: 16 KB flash, 1 KB SRAM
Supply voltage: 1.62 V to 3.6 V recommended operating range; absolute maximum VDD -0.3 V to 4.1 V
Temperature: -40 °C to +125 °C ambient; max junction 130 °C
Package: 8-pin DSBGA, package drawing YCJ, nominal package size about 1.6 mm × 0.86 mm, 0.35 mm max height
Peripherals for 8-pin C1104 package: 3 ADC channels, 1 UART, 1 I2C, 1 SPI, 2 TIMG, 1 TIMA, 6 GPIOs, 2 open-drain 5 V tolerant I/O pins
Required VDD capacitor: 10 µF between VDD and VSS, close to device pins, low ESR, ±20% or better
ESD ratings: HBM ±2000 V, CDM ±500 V

Datasheet pinout cross-check

Table

Ball	Datasheet signal	Symbol terminal present	Symbol pin type in project	Result
A1	PA24	PA24	Bi-Directional	OK
A2	PA0	PA0	Bi-Directional	OK
B1	PA27	PA27	Bi-Directional	OK
B2	PA1 / NRST	PA1/ NRST	Bi-Directional	Acceptable, but reset function could be documented more explicitly
C1	PA20	PA20	Bi-Directional	OK
C2	VDD	VDD	Power In	OK
D1	PA19 / SWDIO	PA19	Bi-Directional	Acceptable, but SWDIO alternate/debug function is not shown in terminal name
D2	VSS	VSS	Power Out	Mismatch: ground should normally be power/ground, not Power Out

Pin function notes from datasheet

PA0 (A2): 5 V tolerant open-drain GPIO; alternate functions include BEEP, I2C0_SDA, TIMG8_C0, SPI0_CS1, FCC_IN, TIMA_FAL1.
PA1 / NRST (B2): 5 V tolerant open-drain GPIO and active-low reset input; alternate functions include I2C0_SCL, TIM8_C0, HFCLK_IN, TIMA0_C1.
PA20 (C1): standard GPIO with A6 ADC input; alternate functions include SWCLK, SPI0_PICO, timer functions, UART0_RTS.
PA24 (A1): standard GPIO with A3 ADC input; alternate functions include SPI0_CS2, timer functions, UART0_RTS, UART0_RX.
PA27 (B1): standard GPIO with A0 ADC input; alternate functions include UART0_TX, SPI0_POCI, SPI0_CS3, timer functions.
PA19 (D1): standard GPIO; SWDIO debug data; alternate functions include SPI0_SCK/POCI and UART0_CTS.
VDD (C2): power supply.
VSS (D2): ground supply.

Footprint cross-check

Datasheet mechanical / land pattern data for YCJ0008-C01:

8-ball DSBGA, 2 columns × 4 rows, balls A-D and 1-2
Ball pitch: 0.35 mm in both axes
Ball diameter: 0.16 mm to 0.20 mm
Example board layout pad / metal diameter: 0.18 mm
Example solder mask opening: 0.18 mm
Preferred solder mask detail: solder-mask-defined
Example stencil aperture: 0.21 mm with 0.075 mm stencil

Observed Flux footprint:

Pad designators match the expected eight signals.
Relative ball map matches the datasheet when interpreted as rows A-D and columns 1-2:
- A1 PA24, A2 PA0
- B1 PA27, B2 PA1/NRST
- C1 PA20, C2 VDD
- D1 PA19, D2 VSS
Pad grid spacing is represented as 0.00035 in the layout data while the footprint declares units as mm. If Flux is displaying internal meter-like coordinates, this may correspond to 0.35 mm; if interpreted literally as millimeters, the footprint is scaled 1000× too small.
Pad size is represented as 0.0001524 with units mm. If interpreted literally, this is 0.0001524 mm, far smaller than the datasheet 0.18 mm land. If interpreted as meters, it is 0.1524 mm, still slightly smaller than the TI example 0.18 mm land and below the 0.16–0.20 mm ball diameter range midpoint.
Silkscreen/outline extents appear approximately ±0.4445 mm × ±0.7874 mm, consistent with about 0.889 mm × 1.575 mm, close to the datasheet E and D package dimensions.

Mismatches / issues flagged

VSS terminal type mismatch: VSS is set to Power Out; it should be a ground/power reference terminal, not an output. Recommended fix: set VSS pin type to a ground/passive/power type appropriate for Flux ERC.
Part is experimental silicon: MPN starts with X; datasheet states X devices are developmental and not recommended for production. Use production MSPM0C1104S8YCJR if this design is intended for manufacture.
Footprint unit ambiguity / possible scale issue: Layout pad positions and sizes are reported as 0.00035 pitch and 0.0001524 pad size with unit mm. This is inconsistent if interpreted literally. The outline looks correctly scaled, so this may be an internal unit/reporting artifact, but the pad geometry should be verified visually or by fabrication export.
Footprint pad diameter may be undersized: If the effective pad is 0.1524 mm, TI example land pattern uses 0.18 mm. Recommended fix: confirm the intended SMD/NSMD choice and adjust pad diameter to TI’s recommended 0.18 mm unless there is a fabrication-specific reason.
Pin descriptions are sparse: Symbol terminals only show primary names. Useful alternate functions such as PA19/SWDIO, PA20/SWCLK, ADC inputs, and I2C/SPI/UART capabilities are not captured as pin descriptions/properties.

Overall result

The schematic symbol pin count and primary ball-to-signal mapping match the TI datasheet. The main issues are the VSS pin type, the experimental X device status, sparse pin descriptions, and footprint pad-size/unit ambiguity that should be resolved before using this as a production-ready part.

Reviewed project metadata
Key datasheet specs
Datasheet pinout cross-check
Pin function notes from datasheet
Footprint cross-check
Mismatches / issues flagged
Overall result