Part Review and Datasheet Update

flux

Completed the fixes and reran the targeted review. Datasheet URL now points to the official NXP RT600 PDF, VDDIO_0 now matches J12/J13/K12/M10, and VSSA now matches D7/D11; details are updated in MIMXRT685SFVKB Part Review (mimxrt685sfvkb-part-review).
Open items:
  • The part now reports 173 schematic terminals after removing three WLCSP-column VDDIO_0 entries; a full 176-ball audit is recommended to identify any missing VFBGA balls/reserved terminals.
  • Most pins still lack detailed Pin Description.
  • VSS/VSSA electrical pin type convention remains worth standardizing.
A

adrian95

Run a full 176-ball audit, restore missing VFBGA balls, and add datasheet pin descriptions.

flux

I’ll audit every current terminal against the RT600 VFBGA176 datasheet, restore any missing balls, and add datasheet-derived pin descriptions where available.

flux

The full audit found an NXP datasheet conflict: VFBGA176 balls D7/D11 are listed both as PIO0_17/PIO0_28 and as VSSA. I’ll preserve the conflict in the review, add descriptions, and avoid silently deleting either assignment without NXP clarification.

flux

Completed the full audit and added datasheet-derived pin descriptions across the part. The review is updated in MIMXRT685SFVKB Part Review (mimxrt685sfvkb-part-review).
Open items:
  • NXP’s Table 4 has an unresolved VFBGA176 conflict: D7/D11 are listed both as PIO0_17/PIO0_28 and as VSSA.
  • I did not restore the three removed WLCSP-column VDDIO_0 balls because they are not valid VFBGA176 assignments.
  • Final 176-ball restoration needs NXP errata/support or another authoritative pin list to resolve D7/D11 safely.
Resolve and verify
Search NXP sources
Validate footprint geometry
Normalize ground pins
Export audit report
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Files

Pins

Symbol

Layout

3D View

Name
Pin #
Type
Part Type
Pin Description
Sub-symbol Designator Suffix
PIO0_19/ CH2A
A1
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 2A, optionally paired with CH2B for differential ADC channel 2.
MIMXRT685SFVKB_1_1
PIO0_26/ CH3A
A2
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 3A, optionally paired with CH3B for differential ADC channel 3.
MIMXRT685SFVKB_1_1
PIO0_14
A3
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
PIO0_15
A5
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
PIO1_2/ CMP0_C
A7
Bi-Directional
Terminal
General-purpose digital input/output pin; analog comparator input C when configured for analog mode.
MIMXRT685SFVKB_1_1
PIO0_25
A9
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
PIO0_31
A11
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
VDD1V8_1
A13
Power In
Terminal
1.8 V supply; can be powered off during deep sleep to reduce current consumption.
MIMXRT685SFVKB_2_1
PMIC_IRQ_N
A15
Input
Terminal
PMIC interrupt input, active low; recommended 10 kΩ pull-up to VDD_AO1V8 when unused.
MIMXRT685SFVKB_2_1
LDO_ENABLE
A16
Power In
Terminal
On-chip regulator enable; tie low if an external PMIC supplies VDDCORE. Do not leave floating.
MIMXRT685SFVKB_2_1
RTCXOUT
A17
Input
Terminal
RTC oscillator output with selectable on-chip crystal load capacitors.
MIMXRT685SFVKB_2_1
PIO1_9/ CH4B
B1
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 4B, optionally paired with CH4A for differential ADC channel 4.
MIMXRT685SFVKB_1_1
PIO0_20/ CH2B
B2
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 2B, optionally paired with CH2A for differential ADC channel 2.
MIMXRT685SFVKB_1_1
PIO0_27/ CH3B
B3
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 3B, optionally paired with CH3A for differential ADC channel 3.
MIMXRT685SFVKB_1_1
PIO1_8/ CH4A
B5
Bi-Directional
Terminal
General-purpose digital input/output pin; analog input 4A, optionally paired with CH4B for differential ADC channel 4.
MIMXRT685SFVKB_1_1
PIO2_31/ CMP0_B
B6
Bi-Directional
Terminal
General-purpose digital input/output pin; analog comparator input B when configured for analog mode.
MIMXRT685SFVKB_2_1
PIO0_18
B7
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
PIO0_24
B9
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
PIO0_29
B10
Bi-Directional
Terminal
General-purpose digital input/output pin.
MIMXRT685SFVKB_1_1
VDD1V8
B11
Power In
Terminal
1.8 V digital supply input.
MIMXRT685SFVKB_2_1
XTALOUT
B13
Power Out
Terminal
Main crystal oscillator output.
MIMXRT685SFVKB_2_1
XTALIN
B14
Power Out
Terminal
Main crystal oscillator input.
MIMXRT685SFVKB_2_1
RESETN
B15
Input
Terminal
External reset input; recommended 100 kΩ pull-up to VDD_AO1V8.
MIMXRT685SFVKB_2_1

MIMXRT685SFVKB