Part Metadata Audit and Verification

flux

Done. I converted the symbol terminals to parametric style and assigned datasheet-based sections across the pin groups: Ground, Power Input, Power Output, Switch Nodes, Current Sense / Monitor, Feedback / Compensation, Frequency / Synchronization, Mode / Enable / Status, and Internal Bias / Auxiliary Supply.
I also verified representative repeated pins, including late-list GND/VIN/VOUT entries, and confirmed the section/style metadata is present.
adrian95

adrian95

add also pin group and pin orientation properties for all pins

flux

I’ll add Pin Group and Pin Orientation metadata to every terminal, grouping by datasheet function and using consistent orientations for parametric symbol layout, then verify representative pins across each group.

flux

Done. I added Pin Group and Pin Orientation properties across the LTM4712 pins.
Verified examples include repeated GND/VIN entries and functional pins across the current sense, feedback/compensation, frequency/sync, mode/status, and internal bias groups.
Run ERC/DRC
Check orientations
Export symbol data
Clean pin metadata
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LTM4712EY#PBF Part Audit
Date: 2026-05-29
Sources
Existing Project Information Reviewed
  • Project name: LTM4712EY-PBF
  • Project description: LTM4712EY#PBF 05-08-7078_ADI
  • Schematic terminals: 144 total terminal components
  • PCB layout: 144 pad nodes in one footprint
  • BOM: no assembled BOM parts are present because this is a part/footprint project, not an assembly schematic
  • Layout footprint: one footprint with 144 pads, silk/fab/eco outline text and reference/value markings
  • Nets: none; expected for a part-library symbol/footprint project
Datasheet Key Specs

Table

ItemDatasheet value
ManufacturerAnalog Devices, Inc.
Part variantsLTM4712EY#PBF, LTM4712IY#PBF
Description36VIN, 12A step-up/step-down buck-boost µModule regulator
Input voltage5V to 36V
Output voltage1V to 36V
Output current12A in buck and buck-boost mode; derates in some high conversion-ratio conditions
Switching frequency100kHz to 600kHz; typical fixed setting 400kHz with RT = 140kΩ
EfficiencyUp to 98%
Package144-ball BGA µModule, 16mm × 16mm × 8.34mm nominal
Operating junction temperature-40°C to +125°C
Storage temperature-55°C to +125°C
RoHSPb-free / RoHS-compliant #PBF ordering code
Absolute Maximum Ratings
  • VIN, VOUT, ISP, ISN, EXTVCC: -0.3V to 38V
  • SW1, SW2: -0.3V to 38V
  • RUN: -0.3V to 12V
  • INTVCC, PGOOD: -0.3V to 6V
  • PHMODE, ISET, IMON, FB, MODE, SS, COMPa, COMPb, FREQ, SYNC, CLKOUT: -0.3V to INTVCC
  • Peak solder reflow body temperature: 245°C
Package / Footprint Data
Package drawing reference: LTC DWG #05-08-7078 Rev A.

Table

ParameterValue
Package body16.00mm × 16.00mm nominal
Height A8.00mm min / 8.34mm nom / 8.68mm max
Ball count144
GridRows A through M, excluding I; columns 1 through 12
Ball pitch1.27mm nominal
Ball diameter b0.70mm min / 0.75mm nom / 0.80mm max
Suggested PCB padØ0.630mm reference, 144×
Ball coordinate offsets±0.6350, ±1.9050, ±3.1750, ±4.4450, ±5.7150, ±6.9850mm
Project layout has 144 pads and a single footprint, which matches the datasheet ball count. The available layout readout did not expose per-pad coordinates or pad diameter, so dimensional verification is limited to pad count and footprint structure unless the footprint rules/geometry are inspected manually in the editor.
Datasheet Pin Groups
  • GND: A1-G1, A2-G2, C3-M3, C4-M4, C5-J5, M5, E6-M6, E7-M7, C8-J8, M8, C9-M9, C10-M10, C11-G11, A12-G12
  • ISP: A3, average current sense amplifier positive input
  • ISN: A4, average current sense amplifier negative input
  • IMON: A5, current monitor output
  • CLKOUT: A6, clock output
  • FREQ: A7, frequency set pin; resistor to SGND
  • PGOOD: A8, open-drain power-good output
  • PHMODE: A9, phase mode input
  • MODE: A10, FCM / pulse-skipping select; tie to GND for FCM or float for pulse-skipping; do not tie to INTVCC
  • SS: A11, soft-start capacitor pin
  • INTVCC: B3, internal 5V regulator output; internally decoupled
  • EXTVCC: B4, external LDO input
  • ISET: B5, average current regulation set pin
  • SYNC: B6, external sync input with internal pulldown; tie to GND if unused
  • SGND: C6-D6 and B7-D8, signal ground; tie to GND with minimum distance
  • RUN: B8, enable input; threshold about 1.22V
  • FB: B9, feedback input; internally connected to VOUT through 100kΩ; add resistor to SGND to program VOUT
  • COMPa: B10, compensation / error amplifier output
  • COMPb: B11, internal compensation network; connect to COMPa for internal compensation
  • VIN: H1-M1 and H2-M2, power input pins
  • VOUT: H11-M11 and H12-M12, power output pins
  • SW1: K5-L5, switch node/test/snubber connection; otherwise leave floating
  • SW2: K8-L8, switch node/test/snubber connection; otherwise leave floating
Cross-Check Results
Confirmed Matches
  • Total terminal/pad count: 144 schematic terminals and 144 footprint pads, matching datasheet ball count.
  • Package family and project description align with Analog Devices package drawing 05-08-7078.
  • Major grouped power pins are present: VIN, VOUT, GND, SGND, SW1, SW2.
  • Control pins are present: CLKOUT, FREQ, PGOOD, PHMODE, MODE, SS, INTVCC, EXTVCC, ISET, SYNC, RUN, FB, COMPa, COMPb, ISP/ISN/IMON.
Mismatches / Issues to Fix
  1. Critical: ISP and ISN are swapped versus datasheet.
    • Datasheet: ISP = A3, ISN = A4.
    • Project symbol: ISN has Pin Number A3 and ISP has Pin Number A4.
    • Impact: current sense polarity would be reversed if a user wires by symbol name; this can break input/output current limiting and IMON behavior.
    • Fix: rename/reassign the A3 terminal to ISP and the A4 terminal to ISN, preserving pad locations.
  2. INTVCC pin type is misleading.
    • Datasheet: INTVCC is an internal 5V regulator output for control circuits, internally decoupled to SGND.
    • Project property: Pin Type: Power In.
    • Suggested fix: change INTVCC terminal type to Power Out or a passive/output-equivalent type so users do not drive it as an input supply.
  3. VOUT pins are marked Passive rather than Power Out.
    • Datasheet: VOUT pins are power output pins and require output capacitors to GND.
    • Project property: VOUT terminals use Pin Type: Passive.
    • Suggested fix: mark VOUT as Power Out if ERC behavior supports that for module outputs.
  4. SW1/SW2 pins are marked Power In, but datasheet treats them as switch-node test/snubber pins.
    • Datasheet: SW1 and SW2 are switching nodes used for testing or optional RC snubber; otherwise leave floating.
    • Project property: SW1/SW2 terminals use Pin Type: Power In.
    • Suggested fix: mark as Passive or Unspecified, not Power In.
  5. Several control/analog pins have generic Unspecified or imperfect pin types.
    • FREQ, MODE, ISP, ISN, COMPa, COMPb, ISET, SS are Unspecified in the project.
    • IMON is marked Bi-Directional; datasheet describes it as a monitor output.
    • Suggested fix: add pin descriptions and more accurate pin types where supported: inputs for FREQ/MODE/ISET/SS/ISP/ISN/FB/RUN/SYNC/PHMODE, output/open-drain for PGOOD, output for IMON/CLKOUT, analog/passive for COMPa/COMPb.
  6. Footprint dimensional verification is incomplete from available structured layout data.
    • Confirmed: 144 pads exist.
    • Not confirmed from structured readout: 1.27mm pitch, Ø0.630mm PCB pads, 16mm × 16mm body outline, and grid coordinate offsets.
    • Suggested fix: inspect/edit footprint pad rules or export footprint geometry and verify against LTC DWG #05-08-7078.
Conclusion
The part project is broadly aligned with the official LTM4712EY#PBF package and pin inventory, but it has one critical symbol mismatch: ISP and ISN are swapped on balls A3/A4. Pin type metadata should also be cleaned up for INTVCC, VOUT, SW1/SW2, current sense, compensation, and monitor/control pins. The footprint has the correct pad count, but dimensional confirmation should be completed against the 05-08-7078 package drawing before releasing the part for reuse.

    Sources

    Existing Project Information Reviewed

    Datasheet Key Specs

    Absolute Maximum Ratings

    Package / Footprint Data

    Datasheet Pin Groups

    Cross-Check Results

    Confirmed Matches

    Mismatches / Issues to Fix

    Recommended Metadata Additions

    Conclusion

Documents

    LTM4712EY#PBF Part Audit

Assets

LTM4712EY-PBF

LTM4712EY-PBF

LTM4712EY-PBF LTM4712EY-PBF_2_1 Symbol.svg
LTM4712EY#PBF-thumb.png

LTM4712EY#PBF-thumb.png

LTM4712EY#PBF-thumbThumbnail
step

LTM4712EY-PBF

05-08-7078_ADI.step3D Model
LTM4712EY-PBF

LTM4712EY-PBF

LTM4712EY-PBF LTM4712EY-PBF_1_1 Symbol.svg
kicad_mod

LTM4712EY-PBF

05-08-7078_ADI.kicad_modFootprint

LTM4712EY-PBF

LTM4712EY-PBF thumbnail
Non-Isolated PoL Module DC DC Converter 1 Output 1 ~ 36V 12A 5V - 36V Input
The LTM®4712 is a high efficiency buck-boost µModule® (micromodule) regulator. The switching controller, power switches, inductor and support components are included in the package. The complete design requires only a few external components, including a resistor to set frequency, a resistor to set output voltage, input, and output capacitors, a sensing resistor to achieve input or output average current regulation. The LTM4712 operates over a 5V to 36V input voltage range and can regulate output voltages between 1V and 36V. The LTM4712 supports selectable forced continuous mode (FCM)/pulse-skipping mode (PSM) operation. The current mode control enables a fast transient response to line and load changes without sacrificing stability. The SYNC input and CLKOUT output allow easy synchronization. It supports multi-phase parallel operation for high power applications. The LTM4712 is offered in a 16mm × 16mm × 8.34mm ball grid array (BGA) package suitable for automated assembly by standard surface mount equipment. The LTM4712 is RoHS-compliant
n Complete Buck-Boost Switch Mode Power Supply n VOUT Equal, Greater, Less Than VIN n Wide Input Voltage Range: 5V to 36V n Wide Output Voltage Range: 1V to 36V n 12A in Buck and Buck-Boost Mode, 6A under 12VIN and 24VOUT n Up to 98% Efficiency n Peak Current Mode Control n Adjustable Input or Output Average Current Limits n Input or Output Current Monitoring n Power Good Output Signal n Parallelable for Increased Output Current n Phase-Lockable Fixed Frequency: 100kHz to 600kHz n Selectable Forced Continuous/Pulse-Skipping Modes n VOUT is Disconnected from VIN During Shutdown n 16mm ×16mm × 8.34mm BGA Package #Power-supply

Properties

LTM4712EY#PBF

Analog Devices Inc.

DC/DC µModule buck-boost regulator

analog.com/media/en/technical-documentation/data-sheets/ltm4712.pdf

U

creativecommons.org/licenses/by/4.0/

parametric-v1

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