Part Metadata Review and Update


I reviewed the current part project against the datasheet workflow: verify the existing datasheet URL first, then compare metadata, pin count, symbol pins, and footprint/pad mapping to the datasheet as the source of truth ## Result - **Datasheet URL already exists**, so no web search or property update was needed. - **Pin count matches**: the project has **8** terminal components, and the datasheet’s SOP8 package also has **8 pins**. - **Symbol-to-footprint pad mapping appears consistent** for all 8 pins. - I found **a few metadata/property issues** and **missing pin-detail fields** worth fixing. ## Current project metadata vs datasheet ### Summary | Field | In project | Datasheet / evidence | Status | |---|---|---:|---| | Description | `NOR Flash` | Serial NOR flash, **128 Mbit / 16 MByte**, standard/dual/quad SPI | Needs improvement | | Manufacturer Name | `GigaDevice Semiconductor (HK) Limited` | **GigaDevice** | Acceptable | | Manufacturer Part Number | `GD25WQ128ESIGR` | Datasheet identifies **GD25WQ128ESIG** as the listed SOP8 industrial option; `...R` parses like reel packing but is not explicitly listed in the valid ordering table | **Possible mismatch / ambiguity** | | Part Type | `Integrated Circuits` | More specific: **SPI NOR Flash** | Too generic | | Designator Prefix | `IC` | IC-type part, so this is fine | OK | | Datasheet URL | Set | Official datasheet content was retrievable from the existing URL | OK | | Package / Case Code | Not shown in project context | SOP8 208 mil, **8 leads**, **1.27 mm pitch**, body approx. **7.90 mm x 5.28 mm nominal** | Missing / should be populated if absent | ### Key specs from the datasheet | Spec | Value | |---|---| | Memory type | **SPI NOR Flash** / Uniform Sector Dual and Quad Serial Flash | | Density | **128 Mbit** | | Capacity | **16 MByte** | | Organization | **16M x 8** | | Interface | **Standard SPI, Dual SPI, Quad SPI** | | Supply voltage | **1.65 V to 3.6 V** | | Temperature range | **-40 C to +85 C** for the `I` grade | | Max fast-read clock | **104 MHz** at **2.3 V to 3.6 V** | | Package | **SOP8 208 mil** | | Lead count | **8** | | Pitch | **1.27 mm** | ## Schematic symbol check The project contains these 8 terminal components: - [CS#](https://www.flux.ai/:handle/:documentSlug?fit=CS#) - [SO_(IO1)](https://www.flux.ai/:handle/:documentSlug?fit=SO_(IO1)) - [WP#_(IO2)](https://www.flux.ai/:handle/:documentSlug?fit=WP#_(IO2)) - [VSS](https://www.flux.ai/:handle/:documentSlug?fit=VSS) - [SI_(IO0)](https://www.flux.ai/:handle/:documentSlug?fit=SI_(IO0)) - [SCLK](https://www.flux.ai/:handle/:documentSlug?fit=SCLK) - [HOLD#/_RESET#_(IO3)](https://www.flux.ai/:handle/:documentSlug?fit=HOLD#/_RESET#_(IO3)) - [VCC](https://www.flux.ai/:handle/:documentSlug?fit=VCC) ### Datasheet pin table | Pin | Datasheet name | Project terminal | Status | |---|---|---|---| | 1 | CS# | [CS#](https://www.flux.ai/:handle/:documentSlug?fit=CS#) | Match | | 2 | SO (IO1) | [SO_(IO1)](https://www.flux.ai/:handle/:documentSlug?fit=SO_(IO1)) | Match | | 3 | WP# (IO2) | [WP#_(IO2)](https://www.flux.ai/:handle/:documentSlug?fit=WP#_(IO2)) | Match | | 4 | VSS | [VSS](https://www.flux.ai/:handle/:documentSlug?fit=VSS) | Match | | 5 | SI (IO0) | [SI_(IO0)](https://www.flux.ai/:handle/:documentSlug?fit=SI_(IO0)) | Match | | 6 | SCLK | [SCLK](https://www.flux.ai/:handle/:documentSlug?fit=SCLK) | Match | | 7 | HOLD#/RESET# (IO3) | [HOLD#/_RESET#_(IO3)](https://www.flux.ai/:handle/:documentSlug?fit=HOLD#/_RESET#_(IO3)) | Match | | 8 | VCC | [VCC](https://www.flux.ai/:handle/:documentSlug?fit=VCC) | Match | ### Symbol findings - **Pin numbers are correct** for all 8 terminals. - **Terminal names match the datasheet well**, with only formatting differences like underscores and parentheses. - **All current Pin Type properties are `Unspecified`** on every terminal. That is incomplete for a part project and should be assigned from datasheet function mapping - I do **not** see `Pin Description` properties on the terminals, so those appear **missing**. - For a simple 8-pin IC, one symbol block is fine; no sub-symbol split is needed ### Recommended pin property mapping | Project terminal | Recommended Pin Type | Short Pin Description | |---|---|---| | [CS#](https://www.flux.ai/:handle/:documentSlug?fit=CS#) | Input | Chip select input | | [SO_(IO1)](https://www.flux.ai/:handle/:documentSlug?fit=SO_(IO1)) | Bi-Directional | Serial data IO1 | | [WP#_(IO2)](https://www.flux.ai/:handle/:documentSlug?fit=WP#_(IO2)) | Bi-Directional | Write protect IO2 | | [VSS](https://www.flux.ai/:handle/:documentSlug?fit=VSS) | Ground | Ground | | [SI_(IO0)](https://www.flux.ai/:handle/:documentSlug?fit=SI_(IO0)) | Bi-Directional | Serial data IO0 | | [SCLK](https://www.flux.ai/:handle/:documentSlug?fit=SCLK) | Input | Serial clock input | | [HOLD#/_RESET#_(IO3)](https://www.flux.ai/:handle/:documentSlug?fit=HOLD#/_RESET#_(IO3)) | Bi-Directional | Hold or reset IO3 | | [VCC](https://www.flux.ai/:handle/:documentSlug?fit=VCC) | Power In | Power supply | I’m calling the IO1/IO2/IO3 pins **Bi-Directional** because the datasheet labels them as data input/output lines in dual/quad modes, even though their legacy single-bit functions are output/input/control. ## Footprint check The layout contains a footprint asset named **`SOIC127P790X216-8N.kicad_mod`** with 8 pads mapped to the 8 terminal IDs. ### Footprint comparison | Check item | Datasheet | Footprint/layout | Status | |---|---|---|---| | Package family | SOP8 208 mil | SOIC-style 8-pin wide-body footprint | Likely compatible | | Pin count | 8 | 8 pads | Match | | Pitch | **1.27 mm** | `127P` implies **1.27 mm** pitch | Match | | Body width | Nominal **7.90 mm** overall width `E`, body `E1` nominal **5.28 mm` | `790` naming suggests **7.90 mm** overall width | Match | | Height | Max **2.16 mm** | `216` naming suggests **2.16 mm** | Match | ### Footprint findings - Although the datasheet calls it **SOP8 208 mil** and the footprint filename uses **SOIC**, the dimensions look **consistent with the datasheet package**. - Pad-to-terminal naming also matches: - pad 1 -> [CS#](https://www.flux.ai/:handle/:documentSlug?fit=CS#) - pad 2 -> [SO_(IO1)](https://www.flux.ai/:handle/:documentSlug?fit=SO_(IO1)) - pad 3 -> [WP#_(IO2)](https://www.flux.ai/:handle/:documentSlug?fit=WP#_(IO2)) - pad 4 -> [VSS](https://www.flux.ai/:handle/:documentSlug?fit=VSS) - pad 5 -> [SI_(IO0)](https://www.flux.ai/:handle/:documentSlug?fit=SI_(IO0)) - pad 6 -> [SCLK](https://www.flux.ai/:handle/:documentSlug?fit=SCLK) - pad 7 -> [HOLD#/_RESET#_(IO3)](https://www.flux.ai/:handle/:documentSlug?fit=HOLD#/_RESET#_(IO3)) - pad 8 -> [VCC](https://www.flux.ai/:handle/:documentSlug?fit=VCC) ## Mismatches and issues to flag ### Definite issues | Item | Issue | |---|---| | Pin Types | All 8 terminals are currently `Unspecified` | | Pin Descriptions | Missing for all terminals | | Description | `NOR Flash` is too generic and omits key searchable specs | | Part Type | `Integrated Circuits` is too broad; `SPI NOR Flash` would be more useful | | Package property | If `Package or Case Code` is not already set, it should be populated as **SOP8 208MIL** | ### Possible issue | Item | Issue | |---|---| | MPN | Project uses `GD25WQ128ESIGR`, while the datasheet’s valid ordering table explicitly lists `GD25WQ128ESIG` for SOP8/I-grade. The datasheet separately explains `R` as reel packing, so this may be a legitimate packaging suffix, but it is **not shown explicitly in the valid part-number list** I retrieved. I’d flag this for manual confirmation. | ## Suggested improved part summary A better project description would be something like: - **128 Mbit SPI NOR Flash memory, 16 MByte, 1.65 V to 3.6 V, standard/dual/quad SPI, SOP8 208 mil** ## Bottom line - **Symbol pin count and numbering:** good - **Symbol names:** good - **Footprint package geometry:** looks correct for the datasheet package - **Footprint pad mapping:** good - **Metadata completeness:** partially incomplete - **Main issues:** missing pin types, missing pin descriptions, overly generic description/part type, and a possible MPN suffix ambiguity If you want, I can next **update the part project properties and terminal properties** to fill in the missing pin types/descriptions and tighten the metadata.
Fix metadata fields
Check MPN ambiguity
Verify decoupling guidance

PCB layout of GD25WQ128ESIGR

GD25WQ128ESIGR