Part Metadata Audit

flux

Applied the functional grouping and verified it.
What changed:
  • Corrected pin labels for pins 6, 7, and 8.
  • Renamed pads 50–53 to EP_ANCHOR1 through EP_ANCHOR4.
  • Assigned exactly one primary Pin Group per terminal: Power, Ground, Reference, Boot, Oscillator, Debug, Analog, PWM, or SPI.
  • Added Pin Type, Pin Description, and 3.3V voltage metadata for the power pins.
I used supported group labels for clean metadata, while keeping the detailed function in each pin description.
adrian95

adrian95

Please also place each terminal into its corresponding section.

flux

I’ll set each terminal’s Section property to match its primary functional group, keeping each pin in only one section, then verify the metadata.

flux

Done. I placed every terminal into a Section aligned to its primary function, with no duplicate section assignment per pin.
I normalized the section names to supported values:
  • Power rails and grounds → Power
  • Exposed pad / corner anchors → Other
  • Reset pin → Reset
  • Oscillator pins → Clock
  • Programming/JTAG pins → Debug
  • Analog/op-amp/ADC/DAC pins → Analog
  • PWM pins → Peripheral
  • SPI pins → Serial
Verified the terminal metadata after applying the changes.
Run ERC/DRC
Verify with datasheet
Clean pin descriptions
Review Other pins
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dsPIC33CK128MP205-I/M4 Part Datasheet Audit
Date: 2026-05-15 Project: dsPIC33CK128MP205-I_M4
Scope
Reviewed available part metadata, symbol terminals, footprint assets, layout pads, and official Microchip datasheet data for dsPIC33CK128MP205-I/M4.
Datasheet Source
  • Official product page found: https://www.microchip.com/en-us/product/dspic33ck128mp205
  • Official datasheet PDF used: https://ww1.microchip.com/downloads/aemDocuments/documents/MCU16/ProductDocuments/DataSheets/dsPIC33CK256MP508-Family-Data-Sheet-DS70005349.pdf
  • Datasheet title/document: dsPIC33CK256MP508 Family Data Sheet, DS70005349K
  • The part project's Datasheet URL was updated from the older Microchip filehandler link to the direct official PDF URL.
Existing Project Metadata Found

Table

FieldProject value / status
MPNdsPIC33CK128MP205-I/M4
ManufacturerMicrochip
Part typeIntegrated Circuits
Designator prefixIC
Datasheet URLUpdated to direct Microchip PDF URL above
Explicit package propertyNot found as a standard project-level property
Explicit pin count propertyNot found as a standard project-level property
DescriptionProject description says: Digital Signal Processors & Controllers - DSP, DSC 16 Bit DSC, 128KB Flash, 16KB RAM, 100MHz, 28Pin, 3 OpAmp, 3 Comp, PTG
Footprint assetPIC24FJ256GA705IM4.kicad_mod associated with this part
3D model assetdsPIC33CK128MP205-I_M4.stp
Symbol assetdsPIC33CK128MP205-I_M4 Symbol.svg
Datasheet Key Specs

Table

SpecDatasheet value
Family rowdsPIC33CK128MP205
Pin count48
Flash128K
Data RAM16K
Core16-bit dsPIC33CK CPU
Max speed100 MIPS at 3.0V to 3.6V over -40C to +85C / +125C; 70 MIPS over -40C to +150C high-temperature devices
Operating VDD3.0V to 3.6V
AVDDGreater of VDD - 0.3V or 3.0V, lesser of VDD + 0.3V or 3.6V; AVDD and VDD difference must not exceed +/-300 mV at all times, including power-up
Industrial ambient range for I suffix-40C to +85C
Absolute maximum VDD-0.3V to +4.0V relative to VSS
5V-tolerant pinsUp to +5.5V only on shaded 5V-tolerant pins when VDD >= 3.0V; otherwise up to +3.6V when VDD ANN2/RP77/RD13
  • Pin 7: ANN2/RP77/RD13_2 -> AN12/ANN0/RP48/RC0
  • Pin 8: ANN2/RP77/RD13_3 -> OA1OUT/AN0/CMP1A/IBIAS0/RA0
  1. Rename pads/terminals 50-53 to descriptive corner-anchor names, for example EP_ANCHOR1 through EP_ANCHOR4, and document that they must share the same net as EP.
  2. Set terminal Pin Type values instead of leaving all pins Unspecified.
  3. Add terminal Pin Description values from the datasheet table.
  4. Add/standardize package metadata: 48-lead UQFN, 6x6 mm body, /M4, 0.40 mm pitch, 4.6x4.6 mm exposed pad.
  5. Consider renaming or replacing the footprint asset with one named for dsPIC33CK128MP205-I_M4 after verifying raw geometry.
Summary Verdict
The part is broadly the correct Microchip MPN and package family, and the footprint pad count is consistent with the 48-lead UQFN plus exposed pad and four corner anchors. However, the symbol has clear pin-name mismatches on pins 7 and 8, incomplete pin typing/descriptions, a project description pin-count error, and a footprint asset name that does not trace directly to this MPN.

    Scope

    Datasheet Source

    Existing Project Metadata Found

    Datasheet Key Specs

    Datasheet 48-Pin UQFN Pinout

    Footprint / Land Pattern Data from Datasheet

    Cross-Check Results

    Metadata

    Symbol pin names and pin numbers

    Footprint

    Pin descriptions

    Recommended Fixes

    Summary Verdict

Documents

    dsPIC33CK128MP205-I/M4 Part Datasheet Audit

Assets

dsPIC33CK128MP205-I_M4

dsPIC33CK128MP205-I_M4

dsPIC33CK128MP205-I_M4 Symbol.svgDefault
DSPIC33CK128MP205-IM4-thumb.png

DSPIC33CK128MP205-IM4-thumb.png

DSPIC33CK128MP205-IM4-thumbThumbnail
stp

dsPIC33CK128MP205-I_M4

dsPIC33CK128MP205-I_M4.stp3D Model
kicad_mod

dsPIC33CK128MP205-I_M4

PIC24FJ256GA705IM4.kicad_modFootprint

DSPIC33CK128MP205-I/M4

DSPIC33CK128MP205-I/M4 thumbnail
dsPIC dsPIC™ 33CK, Functional Safety (FuSa) Microcontroller IC 16-Bit 100MHz 128KB (128K x 8) FLASH 48-UQFN (6x6)
28/36/48/64/80-Pin Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD)
perating Conditions • 3.0V to 3.6V, -40°C to +125°C, DC to 100 MIPS • 3.0V to 3.6V, -40°C to +150°C, DC to 70 MIPS Core: 16-Bit dsPIC33CK CPU • 32-256 Kbytes of Program Flash with ECC and 8-24K RAM • Fast 6-Cycle Divide • LiveUpdate • Code Efficient (C and Assembly) Architecture • 40-Bit Wide Accumulators • Single-Cycle (MAC/MPY) with Dual Data Fetch • Single-Cycle, Mixed-Sign MUL Plus Hardware Divide • 32-Bit Multiply Support • Four Sets of Interrupt Context Saving Registers which Include Accumulator and STATUS for Fast Interrupt Handling • Zero Overhead Looping • RAM Memory Built-In Self-Test (MBIST) Clock Management • Internal Oscillator • Programmable PLLs and Oscillator Clock Sources • Reference Clock Output • Fail-Safe Clock Monitor (FSCM) • Fast Wake-up and Start-up • Backup Internal Oscillator Power Management • Low-Power Management Modes (Sleep, Idle, Doze) • Integrated Power-on Reset and Brown-out Reset High-Speed PWM • Eight PWM Pairs • Up to 250 ps PWM Resolution • Dead Time for Rising and Falling Edges • Dead-Time Compensation • Clock Chopping for High-Frequency Operation • PWM Support for:
  • DC/DC, AC/DC, inverters, PFC, lighting
  • BLDC, PMSM, ACIM, SRM motors • Fault and Current Limit Inputs • Flexible Trigger Configuration for ADC Triggering Timers/Output Compare/Input Capture • One General Purpose Timer • Peripheral Trigger Generator (PTG):
  • Up to 15 trigger sources to other peripheral modules
  • CPU independent state machine-based instruction sequencer • Nine MCCP/SCCP modules which Include Timer, Capture/Compare and PWM:
  • One MCCP
  • Eight SCCPs
  • 16 or 32-bit time base
  • 16 or 32-bit capture
  • 4-deep capture buffer • Fully Asynchronous Operation, Available in Sleep Modes

Properties

Official Microchip dsPIC33CK256MP508 Family Data Sheet DS70005349 applies to dsPIC33CK128MP205-I/M4; /M4 is 48-lead UQFN 6x6 mm with exposed pad.

dsPIC33CK128MP205-I/M4

Microchip

Integrated Circuits

microchip.com/downloads/aemDocuments/documents/MCU16/ProductDocuments/DataSheets/dsPIC33CK256MP508-Family-Data-Sheet-DS70005349.pdf

IC

parametric-v1

creativecommons.org/licenses/by/4.0/

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