Part Metadata Audit and Update
Worked for 2 mins 13 sec
Done. I set datasheet-based pin types, sections, terminal order, and short pin descriptions for all 37 BQ25750RRVR terminals, and converted the symbol terminals to
parametric-v1.I also corrected the two naming issues from the audit:
FSW__SYNC → FSW_SYNC, and pin 37 GND → THERMAL_PAD with Ground pin type and “Exposed thermal pad” description.
Can you make the sections shorter or use fewer sections?
Thought for 6 sec
I’ll consolidate the custom section names into a smaller set of standard, shorter sections while preserving the pin types and descriptions.
Worked for 53 sec
Done. I reduced the BQ25750RRVR symbol from many long functional sections down to 8 shorter groups:
- Interface
- Control
- Analog
- Sense
- Battery
- Gate Drive
- Adapter
- Power
Pin types, terminal order, pin numbers, and descriptions were preserved.
Run ERC/DRC
Show pin groups
Shorten tall sections
Check datasheet groups
Refine this doc
Ask about this doc
BQ25750RRVR Part Audit
Scope
Reviewed available project part information for the BQ25750RRVR part project, found/confirmed the official datasheet, and cross-checked the schematic symbol terminals and footprint pad count against the Texas Instruments datasheet.
Official Datasheet
- Manufacturer: Texas Instruments
- MPN / orderable part number: BQ25750RRVR
- Official datasheet URL: https://www.ti.com/lit/ds/symlink/bq25750.pdf
- Datasheet title: BQ25750: Standalone/I2C Controlled, 1- to 14-Cell Bidirectional Buck-Boost Battery Charge Controller with Direct Power Path Control
- Datasheet document ID/date observed: SLUSDY3, December 2023; package option addendum observed dated 9-Nov-2025
Project Metadata Observed
- Project name: BQ25750RRVR
- Project description: Charger IC, multi-chemistry, 36-VQFN (5 mm x 6 mm), bidirectional buck-boost battery charge controller with power-path management.
- Schematic contents: 37 terminal components representing the IC symbol pins/pad.
- BOM contents: no conventional BOM items; this is a part/library project rather than an assembled circuit.
- Footprint asset: QFN50P500X600X100-37N-D.kicad_mod
- 3D asset: BQ25750RRVR.stp
- Symbol asset: BQ25750RRVR Symbol.svg
- Thumbnail asset present.
Datasheet Key Specs
- Function: 1- to 14-cell bidirectional buck-boost battery charge controller with direct power path control.
- Chemistry support: Li-ion / Li-polymer, and LiFePO4.
- Input operating voltage, VAC: 4.2 V to 70 V recommended.
- Battery voltage range, VBAT: 0 V to 70 V recommended.
- Absolute maximum voltage for VAC, ACUV, ACOV, ACP, ACN, SYS, ACDRV, BATDRV, BATSRC, SRP, SRN, FB, FBG: -0.3 V to 85 V.
- Absolute maximum SW1/SW2: -2 V to 85 V, with -4 V transient for 40 ns.
- Logic/control pin absolute max for CE, FSW_SYNC, ICHG, ILIM_HIZ, INT, REGN, SCL, SDA, MODE, STAT1, STAT2, TS: -0.3 V to 6 V.
- Switching frequency: adjustable/sync 200 kHz to 600 kHz.
- I2C address: 0x6B for BQ25750.
- Charge voltage regulation accuracy: +/-0.5%.
- Charge current regulation accuracy: +/-3%.
- Input current regulation accuracy: +/-3%.
- Integrated 16-bit ADC for input current, charge current, VAC, VBAT, VSYS, and TS monitoring.
- Recommended external capacitors include: VAC 1 uF, REGN 4.7 uF, DRV_SUP 4.7 uF, minimum derated buck-boost input capacitance 160 uF, minimum derated output capacitance 160 uF.
- Thermal: RthetaJA 29.4 °C/W for RRV 36-pin package; operating junction temperature -40 °C to 125 °C; ambient -40 °C to 105 °C.
Datasheet Package / Footprint Requirements
- Package: RRV0036A VQFN, 36 pins, 5 mm x 6 mm body, 0.5 mm pitch, 1 mm max height.
- Exposed thermal pad: pad 37. Datasheet states the package thermal pad must be soldered to the PCB and connected with vias/star connection to PGND and the ground plane for current return and heat dissipation.
- Land pattern excerpt: 36 perimeter pads plus exposed pad; datasheet example uses 36x 0.25 mm by 0.6 mm pads and exposed pad area approximately 3.6 mm by 4.8 mm with via recommendations.
Pin Cross-Check
The schematic symbol has 37 terminals. The footprint view has 37 pads, matching the datasheet convention of 36 package pins plus exposed thermal pad 37.
Table
| Pin | Datasheet name | Project terminal | Status | Notes |
|---|---|---|---|---|
| 1 | SCL | SCL | Match | I2C clock; 10 k pull-up to logic rail recommended. |
| 2 | SDA | SDA | Match | I2C data; 10 k pull-up to logic rail recommended. |
| 3 | INT | ~INT | Acceptable naming | Datasheet describes active-low open-drain interrupt pulse; tilde prefix is appropriate. |
| 4 | STAT1 | STAT1 | Match | Open-drain status output; 10 k pull-up recommended. |
| 5 | STAT2 | STAT2 | Match | Open-drain status output; 10 k pull-up recommended. |
| 6 | PG | ~PG | Acceptable naming | Datasheet describes active-low power-good; tilde prefix is appropriate. |
| 7 | CE | ~CE | Acceptable naming | Datasheet describes active-low charge enable; must not float. |
| 8 | TS | TS | Match | NTC thermistor input; 103AT-2 10 k thermistor recommended. |
| 9 | ICHG | ICHG | Match | Charge current program/monitor; pull to PGND if unused. |
| 10 | ILIM_HIZ | ILIM_HIZ | Match | Input current limit / HIZ control; pull to PGND if unused. |
| 11 | FBG | FBG | Match | Feedback divider return. |
| 12 | FB | FB | Match | Charge voltage feedback input. |
| 13 | SRN | SRN | Match | Charge current sense negative input. |
| 14 | SRP | SRP | Match | Charge current sense positive input. |
| 15 | BATDRV | BATDRV | Match | Battery FET gate drive. |
| 16 | BATSRC | BATSRC | Match | Battery FET common source sense. |
| 17 | PGND | PGND_1 | Functional match | Project suffix distinguishes duplicate PGND pins. |
| 18 | SW2 | SW2 | Match | Boost-side switching node. |
| 19 | HIDRV2 | HIDRV2 | Match | Boost high-side gate driver. |
| 20 | BTST2 | BTST2 | Match | Bootstrap cap to SW2. |
| 21 | LODRV2 | LODRV2 | Match | Boost low-side gate driver. |
| 22 | PGND | PGND_2 | Functional match | Project suffix distinguishes duplicate PGND pins. |
| 23 | DRV_SUP | DRV_SUP | Match | Gate driver supply input; 4.7 uF to PGND. |
| 24 | REGN | REGN | Match | Internal regulator output; 4.7 uF to PGND. |
| 25 | LODRV1 | LODRV1 | Match | Buck low-side gate driver. |
| 26 | BTST1 | BTST1 | Match | Bootstrap cap to SW1. |
| 27 | HIDRV1 | HIDRV1 | Match | Buck high-side gate driver. |
| 28 | SW1 | SW1 | Match | Buck-side switching node. |
| 29 | ACN | ACN | Match | Adapter current sense negative input. |
| 30 | ACP | ACP | Match | Adapter current sense positive input. |
| 31 | ACDRV | ACDRV | Match | Input FET gate drive; datasheet recommends 15 V Zener to ACFET common source. |
| 32 | SYS | SYS | Match | System voltage sense point. |
| 33 | VAC | VAC | Match | Input voltage detection/power; 1 uF to PGND. |
| 34 | ACUV | ACUV | Match | Input undervoltage comparator; do not float. |
| 35 | ACOV | ACOV | Match | Input overvoltage comparator; do not float. |
| 36 | FSW_SYNC | FSW__SYNC | Naming mismatch | Project uses double underscore; datasheet uses single underscore. Recommend renaming to FSW_SYNC for clarity. |
| 37 | Thermal Pad | GND | Description mismatch | Pad count is correct, but symbol names pad 37 as GND. Datasheet calls this Thermal Pad and instructs soldering to board with vias/star connection to PGND/ground plane. Recommend renaming/describing terminal as EP or THERMAL_PAD and setting pin description accordingly. |
Mismatches / Issues Flagged
- Pin 36 naming: project terminal
FSW__SYNCshould beFSW_SYNCto match the datasheet. - Pin 37 naming/description: project terminal
GNDmaps to datasheet Thermal Pad. Electrical connection to ground/PGND is expected, but the pin name and description should identify it as exposed thermal pad rather than ordinary GND. - Pin type metadata: all schematic terminals currently have
Pin Type: Unspecified. Datasheet defines I, IO, O, and P classifications. For symbol quality and ERC behavior, pin types should be updated to match Table 6-1. - Footprint count is correct at 37 pads, but this audit did not verify exact pad geometry from the KiCad footprint against every datasheet land-pattern dimension; the footprint name suggests QFN50P500X600X100-37N-D, which is consistent with 0.5 mm pitch, 5 x 6 mm, 1.0 mm height, 37-pad package naming.
Recommended Corrections
- Rename terminal
FSW__SYNCtoFSW_SYNC. - Rename terminal
GNDor add description for pin 37 asTHERMAL_PAD/EP, while documenting that it must be soldered and connected to PGND/ground plane. - Update terminal pin types from Unspecified to datasheet-based types:
- Inputs: SCL, TS, ICHG, ILIM_HIZ, FBG, FB, SRN, SRP, BATSRC, SYS, ACN, ACP, ACUV, ACOV, FSW_SYNC.
- Bidirectional / IO: SDA, CE.
- Outputs: INT, STAT1, STAT2, PG, BATDRV, HIDRV2, LODRV2, LODRV1, HIDRV1, ACDRV.
- Power: SW2, BTST2, PGND pins, DRV_SUP, REGN, BTST1, SW1, VAC.
- Thermal/mechanical/electrical exposed pad: Thermal Pad / EP, solder to board and connect to PGND/ground plane.
- Consider adding pin descriptions to each terminal using the exact datasheet function summaries for improved symbol documentation.
Scope
Official Datasheet
Project Metadata Observed
Datasheet Key Specs
Datasheet Package / Footprint Requirements
Pin Cross-Check
Mismatches / Issues Flagged
Recommended Corrections
