Part Metadata Audit and Update


Fixed the BQ25622RYKR symbol metadata to match the TI datasheet.
Changes made:
  • Renamed PMID_GD → PG
  • Renamed ILIM/D- → ILIM
  • Renamed TS_BIAS/D+ → TS_BIAS
  • Added datasheet-based pin descriptions for all 18 pins
  • Updated pin types using standard Flux values, including open-drain outputs as Open Collector, I²C SDA as Bi-Directional, and power pins as Power In / Power Out
I verified the final symbol: all 18 pin numbers, names, descriptions, and pin types are now aligned with the TI BQ25622 pin table.
Please also create the parametric symbol and place each pin into the correct section based on the datasheet.
I’ll convert the symbol metadata to parametric style, group pins into datasheet-based functional sections, and verify the section/order fields afterward.
Done. I set all 18 terminals to parametric-v1 and assigned datasheet-based sections, terminal order, and pin orientation.
Sections now used:
  • Power Supply: VBUS, PMID, BTST, SW, SYS, BAT, GND
  • Voltage Regulator: REGN, TS_BIAS
  • Control: ILIM, ~QON, PG, STAT, ~INT
  • Enable: ~CE
  • Analog: TS
  • Communication: SDA, SCL
Verified the updated symbol metadata after applying the changes.
Run ERC/DRC
Review control pins
Check power pin types
Add decoupling capacitors

PG
~INT
ILIM
~CE
PMID
~QON
REGN
STAT
SYS
SW
VBUS
BTST
BAT
TS_BIAS
TS
Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Pin Description
BTST
1
Power In
Power Supply
Top
10
High-side switching MOSFET gate-driver power supply
REGN
2
Power Out
Voltage Regulator
right
40
Charger internal linear-regulator output
PG
3
Open Collector
Control
right
60
Open-drain active-low power-good indicator output
ILIM
4
Input
Control
left
60
Input-current-limit setting input pin
TS_BIAS
5
Power Out
Voltage Regulator
right
40
Bias output for the TS resistor voltage divider
TS
6
Input
Analog
left
30
Temperature qualification voltage input
~QON
7
Input
Control
left
60
BATFET enable or system power-reset control input
BAT
8
Power In
Power Supply
Top
10
Battery charging power connection
SYS
9
Power Out
Power Supply
Top
10
Charger output voltage to system
STAT
10
Open Collector
Control
right
60
Open-drain charge-status output
~INT
11
Open Collector
Control
right
60
Open-drain interrupt output
SDA
12
Bi-Directional
Communication
left
50
I2C interface data
SCL
13
Input
Communication
left
50
I2C interface clock
~CE
14
Input
Enable
left
20
Active-low charge-enable input pin
GND
15
Ground
Ground
Bottom
70
Ground return
SW
16
Power Out
Power Supply
Top
10
Switching node connecting to output inductor
PMID
17
Power In
Power Supply
Top
10
High-side FET drain connection
VBUS
18
Power In
Power Supply
Top
10
Charger input voltage

BQ25622RYKR