Pin Function Grouping


Yes — here’s a non-overlapping pin grouping based on each pin’s primary/common function, so no pin appears twice. I’m using the datasheet pinout and assigning each multifunction pin to the group it most commonly belongs to for symbol organization. This follows the rule that each pin should belong to exactly one functional grouping and that MCU pins are typically grouped by shared function/prefix such as power, clock, control, communication, analog, and GPIO banks .
Recommended functional groups Power

Table


PinName
4VCC
18AVCC
20AREF
Ground

Table


PinName
5GND
21GND
Clock

Table


PinName
7PB6 / XTAL1 / TOSC1
8PB7 / XTAL2 / TOSC2
12PB0 / CLKO / ICP1
Control

Table


PinName
29PC6 / RESET
Communication

Table


PinName
3PE0 / SDA1 / ICP4 / ACO
6PE1 / SCL1 / TC4
14PB2 / SS0 / OC1B
15PB3 / MOSI0 / TXD1 / OC2A
16PB4 / MISO0 / RXD1
17PB5 / XCK1 / SCK0
27PC4 / ADC4 / SDA0
28PC5 / ADC5 / SCL0
30PD0 / RXD0 / OC3A
31PD1 / TXD0 / OC4A
Analog

Table


PinName
10PD6 / AIN0 / OC0A
11PD7 / AIN1
19PE2 / ADC6 / ICP3 / SS1
22PE3 / ADC7 / T3 / MOSI1
23PC0 / ADC0 / MISO1
24PC1 / ADC1 / SCK1
25PC2 / ADC2
26PC3 / ADC3
GPIO / Interrupt / Timer

Table


PinName
1PD3 / INT1 / OC2B
2PD4 / XCK0 / T0
9PD5 / OC0B / T1
13PB1 / OC1A
32PD2 / INT0 / OC3B / OC4B
Why I grouped them this way
  • Power/Ground are isolated as their own groups, which is the standard recommendation for IC-style symbols .
  • RESET is kept as a singleton control pin, which matches the guidance to use singleton control pins as their own logical group .
  • Multifunction pins were assigned to one primary group only, to avoid duplication, exactly as you requested.
  • For MCU-style parts, grouping by the most recognizable functional family is preferred over repeating the same pin in several sections .
A few pins that could reasonably be grouped differently
These are the only ones that are somewhat subjective:
  • Pin 12 PB0: I put it in Clock because of CLKO.
  • Pin 2 PD4: I left it in GPIO / Interrupt / Timer rather than Communication, even though it has XCK0.
  • Pins 27 and 28: I put them in Communication because SDA0/SCL0 is usually the more useful top-level grouping than ADC4/ADC5 for symbol readability.
  • Pins 19 and 22: I put them in Analog because ADC6/ADC7 is their most recognizable primary use.
If you want, I can next turn this into a Flux-ready pin grouping plan with:
  • Section
  • Pin Group
  • Pin Orientation
  • Sub-symbol Designator Suffix
for every pin in the project.
Group the pins
Use these categories
Check against datasheet

Name
Pin #
Type
Part Type
Pin Orientation
Section
Terminal Order
Terminal Type
PD3
1
Unspecified
Terminal
GPIO
60
bidi
PD4
2
Unspecified
Terminal
GPIO
60
bidi
PE0
3
Unspecified
Terminal
Communication
40
bidi
VCC
4
Unspecified
Terminal
Top
Power
10
powerIn
GND
5
Unspecified
Terminal
GND
100
powerIn
PE1
6
Unspecified
Terminal
Communication
40
bidi
XTAL1/PB6
7
Unspecified
Terminal
Clock
20
bidi
XTAL2/PB7
8
Unspecified
Terminal
Clock
20
bidi
PD5
9
Unspecified
Terminal
GPIO
60
bidi
PD6
10
Unspecified
Terminal
Analog
60
bidi
PD7
11
Unspecified
Terminal
Analog
60
bidi
PB0
12
Unspecified
Terminal
Clock
20
bidi
PB1
13
Unspecified
Terminal
GPIO
60
bidi
PB2
14
Unspecified
Terminal
Communication
40
bidi
PB3
15
Unspecified
Terminal
Communication
40
bidi
PB4
16
Unspecified
Terminal
Communication
40
bidi
PB5
17
Unspecified
Terminal
Communication
40
bidi
AVCC
18
Unspecified
Terminal
Top
Power
10
powerIn
PE2
19
Unspecified
Terminal
Analog
60
bidi
AREF
20
Unspecified
Terminal
Top
Power
10
passive
GND
21
Unspecified
Terminal
GND
100
passive
PE3
22
Unspecified
Terminal
Analog
60
bidi
PC0
23
Unspecified
Terminal
Analog
60
bidi

ATMEGA328PB-AU