Pin Function Grouping Request

flux

0:21

Explaining grouping pins.

Yes — a pin should not be duplicated across groups.
For this workflow, each pin gets:
  • exactly one Section such as Power, Ground, GPIO, Communication, Analog, Clock, Control, Debug, or No Connect
  • exactly one sub-symbol grouping when the IC is split into multiple symbol blocks; the rule is that every pin must belong to exactly one sub-symbol
So if I group the pins for you, I would do it like this:

Grouping rule

CaseHow I would handle it
VDD_1, VDD_2, VDDIO, 3V3_*Put each pin once under Power
GND_1, GND_2, VSS, AGND, DGNDPut each pin once under Ground
USB_DP, USB_DMPut each pin once under Communication with pin group USB
SPI1_MOSI, SPI1_MISO, SPI1_SCKPut each pin once under Communication with pin group SPI1
PA0, PA1, PB0Put each pin once under GPIO with pin groups like PA, PB
RESET, BOOT0Put each pin once under Control
NCPut each pin once under No Connect
Important nuance
A pin can have:
  • one Section for its main function
  • one Pin Group for its family/prefix
For example:
  • SPI1_MOSI
    • Section = Communication
    • Pin Group = SPI1
  • PA3
    • Section = GPIO
    • Pin Group = PA
  • GND_2
    • Section = Ground
    • Pin Group = GND or Ground depending on naming convention
That grouping method is explicitly recommended: sections classify the broad function, while pin groups collect related pins by shared prefix like PA, SPI1, USART2, USB, etc.
So your expectation is correct:
  • I should not list the same pin in both Power and Communication
  • I should choose the pin’s primary/common function
  • then place it in one functional group only
If you want, I can now produce the actual grouped list for the Apollo510B in this exact format:

Apollo510B pin groups

SectionPins
Power...
Ground...
GPIO...
Communication...
Analog...
Clock...
Control...
Debug...
No Connect...
And I’ll make sure each pin appears once only.
Avoid duplicate grouped pins
Prioritize common functions
Clean up duplicates
2 days
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    stp

    AP510BFA-CBR

    AP510BFA-CBR.stp3D Model
    AP510BFA-CBR

    AP510BFA-CBR

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    kicad_mod

    AP510BFA-CBR

    BGA153C40P13X13_560X560X80.kicad_modFootprint

    AP510BFA-CBR

    AP510BFA-CBR thumbnail
    RF System on a Chip - SoC Cortex-M55 250MHz, 2.5D GPU, 4MB MRAM, 3.75MB SRAM, BLE5.4, -20 to +70 C, BGA , 1.71 V to 2.2 V -20C ~ 70C ARM® Cortex®-M55 System On Chip (SOC) IC Apollo510B 250MHz The AP510BFA-CBR is an ultra-low-power MCU System-on-Chip (SoC) designed for advanced embedded and edge-AI applications. It belongs to the Apollo510B series and integrates a powerful ARM Cortex-M55 processor optimized for both performance and energy efficiency.
    It combines processing, memory, and multiple peripherals into a single BGA package, making it suitable for compact and power-sensitive designs. Key Characteristics Core: ARM Cortex-M55 Max CPU Speed: 250 MHz Architecture: MCU / SoC Flash Memory: 4 MB RAM: ~3.75 MB Connectivity: I2C, SPI, UART, USB Wireless Support: Bluetooth 5.4 (variant dependent) Package: 153-BGA (compact high-density package) Key Features Built on Ambiq’s ultra-low-power SPOT technology Designed for battery-powered and energy-sensitive devices High computational performance for edge AI and DSP workloads Integrated peripherals for embedded system development Typical Applications Wearables (smartwatches, fitness bands) Smart home and IoT devices Edge AI / machine learning nodes Industrial sensors and monitoring systems Wireless communication modules #CommonPartsLibrary #IntegratedCircuit #SoC #Apollo510B

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    AP510BFA-CBR

    Ambiq Micro, Inc.

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    contentportal.ambiq.com/documents/20123/4032909/Apollo510B-SoC-Datasheet.pdf?token=eyJ0eXAiOiJKV1QiLCJhbGciOiJIUzI1NiJ9.eyJyZWRpcmVjdFVybCI6Imh0dHBzOi8vY29udGVudHBvcnRhbC5hbWJpcS5jb20vZG9jdW1lbnRzLzIwMTIzLzQwMzI5MDkvQXBvbGxvNTEwQi1Tb0MtRGF0YXNoZWV0LnBkZiJ9.7kvw_hG5CoU2waL-Pqwjcb73Qi0iHFbYpuVlHuiDpmc

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