Part Information Review and Datasheet Update

adrian95

adrian95

Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.

flux

I’ll review the part metadata, find and set the official datasheet if missing, then compare symbol pins/footprint/pin descriptions against the datasheet and summarize mismatches.

flux

Official Analog Devices datasheet found and the project Datasheet URL property has been set; I’m now checking the 52 terminal pins and footprint against the datasheet.

flux

Completed the ADF5611BCCZ review and added the official Analog Devices datasheet URL to the project. The main issue is a pin-count/footprint mismatch: the project has 52 pads/terminals, while the datasheet defines a 48-terminal LGA plus EPAD; pins 49–52 appear extra unless they are intended EPAD subdivisions.
Full review saved in the project document: adf5611bccz-part-information-review (ADF5611BCCZ Part Information Review).
Fix pin metadata
Verify EPAD pads
Update package properties
Run ERC DRC
Review footprint dimensions
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ADF5611BCCZ Part Information Review
Source
Project metadata reviewed
Datasheet key specifications
  • Part: ADF5611 microwave wideband synthesizer with integrated VCO.
  • RFOUT frequency range: 7300 MHz to 14,600 MHz.
  • PDIV_OUT / NDIV_OUT range: 57 MHz to 14,600 MHz.
  • Synthesizer modes: fractional-N and integer-N PLL.
  • RFOUT power: 6 dBm typical.
  • Typical power dissipation: 1 W.
  • PLL/logic supplies: 3.15 V to 3.45 V for AVDD, VCCHF, VCCPS, VCCPD, RVDD, DVDD, VPPCP, VDDLS, VDD1, VDD2, VDD3.
  • VCO supply: VCOVCC 4.75 V to 5.25 V.
  • Temperature range for ADF5611BCCZ: -40 °C to +85 °C.
  • SPI: 3-wire or 4-wire serial interface; SCK up to 65 MHz.
  • Charge pump output current: 0.2 mA to 3.2 mA in 200 µA steps.
Datasheet package and ordering information
  • ADF5611BCCZ package: 48-Terminal Land Grid Array [LGA].
  • Package option: CC-48-14.
  • Packing: tray.
  • Exposed pad: datasheet defines EPAD tied to DC/RF ground.
Symbol/pin cross-check
The schematic symbol is implemented as Terminal entries. Pins 1 through 48 match the datasheet mnemonic mapping:
  • GND: 1, 3, 5, 7, 9, 11, 12, 14, 16, 18, 20, 22, 24, 25, 26, 30, 32, 36, 38, 40, 45, 47
  • RVDD: 2
  • VDDLS: 4
  • CP: 6
  • VPPCP: 8
  • AVDD: 10
  • CREG: 13
  • VCCPD: 15
  • VCCPS: 17
  • SDO: 19
  • VCCHF: 21
  • VDD1: 23
  • NDIV_OUT: 27
  • PDIV_OUT: 28
  • VDD3: 29
  • RFOUT: 31
  • VCOVCC: 33
  • VDD2: 34
  • VPRST: 35
  • VT: 37
  • VG: 39
  • SCK: 41
  • SDIO: 42
  • CSB: 43
  • CEN: 44
  • DVDD: 46
  • XREFP: 48
Footprint cross-check
The PCB footprint contains 52 pad nodes. The datasheet ordering/package section identifies ADF5611BCCZ as a 48-terminal LGA, package option CC-48-14, with an exposed pad. The project footprint therefore appears to have four extra numbered GND pads (49, 50, 51, 52) beyond the datasheet pin table. If these are intended as segmented exposed-pad lands, they should be represented/identified as EPAD ground lands rather than normal numbered terminals unless the manufacturer land pattern explicitly numbers them.
Mismatches / issues flagged
  1. Footprint/pin-count mismatch: Project has 52 terminal/pad entries; datasheet pin table has pins 1–48 plus EPAD. Pins 49–52 are not listed in the datasheet pin function table.
  2. Missing pin descriptions: Terminal components do not include Pin Description properties matching datasheet functional descriptions.
  3. Questionable pin types: CSB is marked Unspecified but datasheet defines it as a CMOS input. VG and VT are marked Unspecified; they should be classified as analog/passive or equivalent signal pins if supported. GND pins are marked Power Out; for IC ground pins, Power In/Power or Ground classification may be more appropriate depending on Flux symbol conventions.
  4. Package metadata incomplete: Project description includes CC-48-14_ADI, but no explicit Package/Package or Case Code property was found in project metadata.
  • Confirm whether pads 49–52 are intentional exposed-pad subdivisions from an ADI land pattern. If yes, label them as EPAD/GND thermal lands rather than datasheet pins 49–52; if not, remove them.
  • Add Pin Description properties from the datasheet table for all terminals.
  • Update CSB Pin Type to Input; consider analog/passive classifications for VT and VG.
  • Add explicit package metadata: 48-Terminal LGA, CC-48-14.

    Source

    Project metadata reviewed

    Datasheet key specifications

    Datasheet package and ordering information

    Symbol/pin cross-check

    Footprint cross-check

    Mismatches / issues flagged

    Recommended fixes

Documents

    ADF5611BCCZ Part Information Review

Assets

ADF5611BCCZ-thumb.png

ADF5611BCCZ-thumb.png

ADF5611BCCZ-thumbThumbnail
kicad_mod

ADF5611BCCZ

CC-48-14_ADI.kicad_modFootprint

ADF5611BCCZ

ADF5611BCCZ thumbnail
RF IC Synthesizer, VCO VSAT 7.3GHz ~ 14.6GHz SPI Interface 48-LGA (7x7)
The ADF5611 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and an external reference source. The wideband microwave voltage controlled oscillator (VCO) design permits frequency operation from 7300MHz to 14,600MHz at a single RF output. A series of frequency dividers with a differential frequency output allows operation from 57MHz to 14,600MHz. Analog and digital power supplies for the PLL circuitry range from 3.15V to 3.45V, and the VCO supplies are between 4.75V and 5.25V. The ADF5611 has an integrated VCO with a fundamental frequency of 3650MHz to 7300MHz. These frequencies are internally doubled and routed to the RFOUT pin. An additional differential output allows the doubled VCO frequency to be divided by 1, 2, 4, 8, 16, 32, 64, or 128, allowing the user to generate RF output frequencies as low as 57MHz. A simple 3- or 4-wire serial port interface (SPI) provides control of all on-chip registers. To conserve power, this divider block can be disabled when not needed through the SPI. Likewise, the output power for both the single-ended output and the differential output are programmable. The integrated phase detector and Δ-Σ modulator, capable of operating at up to 100MHz, permit wide loop bandwidths and fast frequency tuning with a typical spurious level of −105dBc. With a VCO open-loop phase noise at an 100kHz offset from −115dBc/Hz at a 7.3GHz RFOUT to −109dBc/Hz at a 14.6GHz RFOUT, the ADF5611 is equipped to minimize blocker effects and to improve receiver sensitivity and transmitter spectral purity. The low phase noise floor eliminates any contribution to modulator and mixer noise floor in transmitter applications.
► RFOUT frequency range: 7300MHz to 14,600MHz ► PDIV_OUT and NDIV_OUT frequency range: 57MHz to 14,600MHz ► Fractional-N synthesizer and integer-N synthesizer modes ► Typical PFD spurious: <−105dBc ► Integrated RMS jitter at 1kHz to 100MHz integration bandwidth: <40fs ► Normalized inband phase noise floor FOM ► Integer mode: −232dBc/Hz ► Fractional mode: −229dBc/Hz ► Maintains frequency lock over −40°C to +85°C (lock and leave) ► Low phase noise VCO ► −115dBc/Hz typical at 100kHz (7.3GHz) ► −114dBc/Hz typical at 100kHz (10GHz) ► −109dBc/Hz typical at 100kHz (14.6GHz) ► RFOUT power (typical): 6dBm ► Programmable divide by 1, 2, 4, 8, 16, 32, 64, or 128 output ► Programmable output power level ► Typical power dissipation: 1W ► 48-terminal, 7 mm × 7 mm LGA package: 49 mm2
#ADF5611BCCZ #ADF5611 #FrequencySynthesizer #PLL #MicrowaveSynthesizer #RFIC #LowPhaseNoise #VCO #WirelessInfrastructure #SatelliteCommunication #MicrowaveRadio #TestAndMeasurement #AnalogDevices #RFDesign #ClockGeneration

Properties

ADF5611BCCZ

Analog Devices Inc.

Integrated Circuit

analog.com/media/en/technical-documentation/data-sheets/adf5611.pdf

IC

parametric-v1

creativecommons.org/licenses/by/4.0/

48-LGA

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