Project Specification in Markdown


i would like to strart new project - do you use md files for defenition ?
Yes — I can use Markdown (.md) files for project definition/specification in Flux.
For a new project, I typically create a Project Specification Markdown file that captures:
  • project goal and use case
  • electrical requirements
  • power input/output requirements
  • major components / architecture
  • interfaces and connectors
  • size/mechanical constraints
  • safety/regulatory constraints
  • validation and bring-up checklist
A simple starting definition could look like:

Md


# Project Specification ## Goal Describe what the device should do. ## Requirements - Input power: - Outputs: - Sensors / signals: - User interface: - Connectivity: - Size constraints: - Environment: ## Architecture High-level block diagram or subsystem list. ## Validation How we will test that the design works.
If you want, send me a short description of the product you want to build, and I can create the initial Markdown project definition for this Flux project.

U4
U2 RXM3 - J3 RD-
U2 TXP4 - J4 TD+
J1 CT_2 - J2 CT_1
U3 CANH - J5 1
U2 TXM4 - J4 TD-
J3 CT_2 - J4 CT_1
U2 RXP3 - J3 RD+
U2 RXP2 - J2 RD+
R30 P2 - U2 SMTXEN
U1 PD0 - U4 R
U1 PA_2 - U2 MDIO
U2 RXP4 - J4 RD+
U1 PB13 - R10 P1
U2 RST_N - U2 PWRDN_N
C5 P1 - C6 P1
U1 PA_14 - J9 7
U1 PDR_ON - U2 VDDIO
U2 TXM1 - J1 TD-
U2 TXP1 - J1 TD+
U1 PC4 - U2 SMRXD0
U2 TXP2 - J2 TD+
C5 P1 - C6 P1
U2 RXM3 - J3 RD-
U1 PDR_ON - U2 VDDIO
U2 RXP2 - J2 RD+
U2 RXP3 - J3 RD+
U1 VCAP_2 - C31 P1
U1 PB3 - J9 8
U2 LDO_O - U2 VDDC
J1 CT_2 - J2 CT_1
U2 TXP2 - J2 TD+
U1 PA_14 - J9 7
C5 P1 - C6 P1
U2 TXM4 - J4 TD-
U2 RXM1 - J1 RD-
U2 TXM1 - J1 TD-
U1 VDD_1 - U1 VDD_2
U2 TXM2 - J2 TD-
U3 CANL - J5 2
U2 TXM2 - J2 TD-
U1 PD1 - U4 D
U2 TXP1 - J1 TD+
U2 RXP4 - J4 RD+
C5 P1 - C6 P1
C5 P1 - C6 P1
U2 TXP3 - J3 TD+
U2 LDO_O - U2 VDDC
U1 PA_13 - J9 3
U1 VDD_1 - U1 VDD_2
U2 RST_N - U2 PWRDN_N
U2 RXM4 - J4 RD-
U2 TXP3 - J3 TD+
U2 RXM1 - J1 RD-
U2 TXM3 - J3 TD-
J2 CT_2 - J3 CT_1
U1 PA_1 - U2 SMTXC/SMREFCLK
U1 PD0 - U4 R
R10 P2 - U2 SMTXD1
U1 PD1 - U4 D
U1 PDR_ON - U2 VDDIO
U2 ISET - R3 P1
C5 P1 - C6 P1
U1 PB11 - R30 P1
U2 RXM2 - J2 RD-
U1 PC1 - U2 MDC
U1 PDR_ON - U2 VDDIO
J3 CT_2 - J4 CT_1
U2 TXM3 - J3 TD-
U4 CANL - R20 P2
U1 PDR_ON - U2 VDDIO
U1 PB12 - R9 P1
U4 CANH - R20 P1
U2 LDO_O - U2 VDDC
U1 NRST - R2 P1
U2 TXP4 - J4 TD+
U3 GND2 - C27 P2
C5 P1 - C6 P1
U1 VDD_1 - U1 VDD_2
U2 RXM4 - J4 RD-
J2 CT_2 - J3 CT_1
U1 VDD_1 - U1 VDD_2
U1 PA_13 - J9 3
C5 P1 - C6 P1
R9 P2 - U2 SMTXD0
U1 VCAP_1 - C50 P1
U2 RXP1 - J1 RD+
U2 RXM2 - J2 RD-
U1 VDD_1 - U1 VDD_2
U2 RST_N - U2 PWRDN_N
U1 PA_7 - U2 SMRXDV/SMCRSDV
U2 LDO_O - U2 VDDC
U2 RXP1 - J1 RD+
U1 PC5 - U2 SMRXD1
U1 VDD_1 - U1 VDD_2
U2 GNDD - U2 GNDD
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
C29 P2 - J9 2
U2 IN_PWR_SEL - U2 PS0
U2 SCANEN - U2 TEST2
U2 SCONF1 - U2 MDIXDIS
J1 GND - J2 GND
J1 GND - J2 GND
U2 GNDD - U2 GNDD
U2 GNDD - U2 GNDD
U1 VSS_1 - U1 VSS_2
J1 GND - J2 GND
U4 GND - C28 P2
U2 GNDD - U2 GNDD
U2 GNDD - U2 GNDD
U4 GND - C28 P2
U2 PS1 - U2 SCONF0
U2 SCANEN - U2 TEST2
U4 GND - C28 P2
U2 GNDD - U2 GNDD
U2 GNDA - U2 GNDA
U2 SCONF1 - U2 MDIXDIS
U2 IN_PWR_SEL - U2 PS0
GND
U2 GNDA - U2 GNDA
J1 GND - J2 GND
U2 PS1 - U2 SCONF0
U1 VSS_1 - U1 VSS_2
J2
J1
J4
J3
J9
J5
U2
J10
U1

CT04 Intelligent Control PCB

CT04 Intelligent Control PCB thumbnail