Project Specification in Markdown

U4
U2 RXM3 - J3 RD-
PS1 +VOUT - C26 P1
U2 TXP4 - J4 TD+
U1 VDD_1 - U1 VDD_2
J1 CT_2 - J2 CT_1
U3 CANH - J5 1
C5 P1 - C6 P1
U4 CANH - R20 P1
U2 TXM4 - J4 TD-
U1 VREF+ - U1 VBAT
U1 BOOT0 - R1 P1
J3 CT_2 - J4 CT_1
U1 PB3 - J9 8
C5 P1 - C6 P1
U2 RXP3 - J3 RD+
C5 P1 - C6 P1
U2 RXP2 - J2 RD+
R30 P2 - U2 SMTXEN
U1 PB5 - U3 RXD
U1 PD0 - U4 R
U1 VDD_1 - U1 VDD_2
U1 PA_2 - U2 MDIO
U2 RXP4 - J4 RD+
U1 PB13 - R10 P1
U2 RST_N - U2 PWRDN_N
C5 P1 - C6 P1
U1 PA_14 - J9 7
U1 PDR_ON - U2 VDDIO
U1 PB6 - U3 TXD
J8 2 - U5 INPUT
C5 P1 - C6 P1
U3 GND2 - C27 P2
U2 TXM1 - J1 TD-
C5 P1 - C6 P1
U1 VREF+ - U1 VBAT
U1 VDD_1 - U1 VDD_2
C5 P1 - C6 P1
U2 TXP1 - J1 TD+
U1 PC4 - U2 SMRXD0
U2 TXP2 - J2 TD+
U1 PC5 - U2 SMRXD1
R10 P2 - U2 SMTXD1
C5 P1 - C6 P1
U2 RXM3 - J3 RD-
U1 PDR_ON - U2 VDDIO
C5 P1 - C6 P1
U2 RXP2 - J2 RD+
U2 RXP3 - J3 RD+
U1 PA_1 - U2 SMTXC/SMREFCLK
U1 VCAP_2 - C31 P1
U1 VREF+ - U1 VBAT
U1 PB3 - J9 8
U2 LDO_O - U2 VDDC
C5 P1 - C6 P1
J1 CT_2 - J2 CT_1
C5 P1 - C6 P1
U2 TXP2 - J2 TD+
U1 PA_14 - J9 7
C5 P1 - C6 P1
U2 TXM4 - J4 TD-
C5 P1 - C6 P1
U2 RXM1 - J1 RD-
U1 NRST - R2 P1
U2 TXM1 - J1 TD-
U1 VDD_1 - U1 VDD_2
U3 GND2 - C27 P2
U4 CANH - R20 P1
U1 PB6 - U3 TXD
C5 P1 - C6 P1
U2 TXM2 - J2 TD-
U1 BOOT0 - R1 P1
C5 P1 - C6 P1
C5 P1 - C6 P1
U1 PDR_ON - U2 VDDIO
U1 PC1 - U2 MDC
PS1 +VOUT - C26 P1
R30 P2 - U2 SMTXEN
U3 CANL - J5 2
U2 TXM2 - J2 TD-
U1 PD1 - U4 D
U2 TXP1 - J1 TD+
U2 RXP4 - J4 RD+
C5 P1 - C6 P1
C5 P1 - C6 P1
U2 TXP3 - J3 TD+
C5 P1 - C6 P1
U2 LDO_O - U2 VDDC
U1 PA_13 - J9 3
U2 LDO_O - U2 VDDC
J8 2 - U5 INPUT
U1 VDD_1 - U1 VDD_2
U2 RST_N - U2 PWRDN_N
U2 RXM4 - J4 RD-
U2 TXP3 - J3 TD+
U2 RXM1 - J1 RD-
U2 TXM3 - J3 TD-
C5 P1 - C6 P1
U3 CANL - J5 2
C5 P1 - C6 P1
U1 NRST - R2 P1
U1 PC4 - U2 SMRXD0
PS1 +VOUT - C26 P1
U1 VREF+ - U1 VBAT
C5 P1 - C6 P1
U1 PA_7 - U2 SMRXDV/SMCRSDV
J2 CT_2 - J3 CT_1
U1 PB12 - R9 P1
U1 PA_1 - U2 SMTXC/SMREFCLK
U1 PD0 - U4 R
R10 P2 - U2 SMTXD1
U1 PD1 - U4 D
U1 PA_2 - U2 MDIO
U1 PDR_ON - U2 VDDIO
C5 P1 - C6 P1
U2 ISET - R3 P1
J8 2 - U5 INPUT
C5 P1 - C6 P1
C5 P1 - C6 P1
C5 P1 - C6 P1
U1 PB13 - R10 P1
U1 PB11 - R30 P1
U2 RXM2 - J2 RD-
U4 CANL - R20 P2
C5 P1 - C6 P1
J8 2 - U5 INPUT
U1 PC1 - U2 MDC
U1 PDR_ON - U2 VDDIO
U1 VDD_1 - U1 VDD_2
J3 CT_2 - J4 CT_1
U2 TXM3 - J3 TD-
U4 CANL - R20 P2
U1 PB11 - R30 P1
U1 PDR_ON - U2 VDDIO
C5 P1 - C6 P1
PS1 +VOUT - C26 P1
U1 PB12 - R9 P1
U4 CANH - R20 P1
U1 VCAP_2 - C31 P1
U2 LDO_O - U2 VDDC
U1 VCAP_1 - C50 P1
R9 P2 - U2 SMTXD0
U1 NRST - R2 P1
U1 VREF+ - U1 VBAT
U2 TXP4 - J4 TD+
U3 GND2 - C27 P2
C5 P1 - C6 P1
U1 VDD_1 - U1 VDD_2
C5 P1 - C6 P1
U2 RXM4 - J4 RD-
U3 CANH - J5 1
J2 CT_2 - J3 CT_1
U2 ISET - R3 P1
U1 VDD_1 - U1 VDD_2
U1 PA_13 - J9 3
C5 P1 - C6 P1
C5 P1 - C6 P1
U3 GND2 - C27 P2
R9 P2 - U2 SMTXD0
U1 VCAP_1 - C50 P1
U2 RXP1 - J1 RD+
U1 NRST - R2 P1
U2 RXM2 - J2 RD-
U3 GND2 - C27 P2
U1 PB5 - U3 RXD
U1 VDD_1 - U1 VDD_2
J8 2 - U5 INPUT
U1 VDD_1 - U1 VDD_2
U2 RST_N - U2 PWRDN_N
U1 PA_7 - U2 SMRXDV/SMCRSDV
C5 P1 - C6 P1
U4 CANL - R20 P2
U1 VDD_1 - U1 VDD_2
U2 LDO_O - U2 VDDC
U2 RXP1 - J1 RD+
U1 VREF+ - U1 VBAT
U1 PC5 - U2 SMRXD1
U1 VDD_1 - U1 VDD_2
J8 4 - U5 GROUND
J8 4 - U5 GROUND
U2 GNDD - U2 GNDD
U1 VSS_1 - U1 VSS_2
C5 P2 - C6 P2
C5 P2 - C6 P2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
U1 VSS_1 - U1 VSS_2
J8 4 - U5 GROUND
U1 VSS_1 - U1 VSS_2
J8 4 - U5 GROUND
U1 VSS_1 - U1 VSS_2
C5 P2 - C6 P2
J8 4 - U5 GROUND
J8 4 - U5 GROUND
C5 P2 - C6 P2
C29 P2 - J9 2
U1 VSS_1 - U1 VSS_2
C5 P2 - C6 P2
C5 P2 - C6 P2
U2 SCONF1 - U2 MDIXDIS
C29 P2 - J9 2
U2 IN_PWR_SEL - U2 PS0
U2 SCANEN - U2 TEST2
U2 SCONF1 - U2 MDIXDIS
J1 GND - J2 GND
U4 GND - C28 P2
C5 P2 - C6 P2
J1 GND - J2 GND
U2 GNDD - U2 GNDD
U3 GND1 - C40 P2
J8 4 - U5 GROUND
C5 P2 - C6 P2
U2 GNDD - U2 GNDD
U2 GNDD - U2 GNDD
J8 4 - U5 GROUND
C5 P2 - C6 P2
J8 4 - U5 GROUND
U1 VSS_1 - U1 VSS_2
J8 4 - U5 GROUND
J1 GND - J2 GND
U4 GND - C28 P2
U2 GNDD - U2 GNDD
C5 P2 - C6 P2
U2 GNDD - U2 GNDD
C5 P2 - C6 P2
J8 4 - U5 GROUND
GND
U3 GND1 - C40 P2
U4 GND - C28 P2
U2 PS1 - U2 SCONF0
U2 SCANEN - U2 TEST2
U4 GND - C28 P2
J8 4 - U5 GROUND
U2 GNDD - U2 GNDD
C5 P2 - C6 P2
U2 GNDA - U2 GNDA
U2 SCONF1 - U2 MDIXDIS
U2 IN_PWR_SEL - U2 PS0
C5 P2 - C6 P2
GND
GND
J8 4 - U5 GROUND
U4 GND - C28 P2
U2 GNDA - U2 GNDA
C5 P2 - C6 P2
J1 GND - J2 GND
U2 PS1 - U2 SCONF0
U1 VSS_1 - U1 VSS_2
C5 P2 - C6 P2
U1 VSS_1 - U1 VSS_2
U2 GNDD - U2 GNDD
U3
U5
C29
Capacitance
20pF
C5
Capacitance
100nF
C40
Capacitance
100nF
C19
Capacitance
100nF
C6
Capacitance
100nF
C1
Capacitance
100nF
C2
Capacitance
100nF
C14
Capacitance
100nF
C18
Capacitance
100nF
C16
Capacitance
10uF
C12
Capacitance
100nF
C21
Capacitance
100nF
C10
Capacitance
100nF
C30
Capacitance
100nF
C7
Capacitance
100nF
C24
Capacitance
100nF
C13
Capacitance
100nF
C11
Capacitance
100nF
C15
Capacitance
10uF
C26
Capacitance
100nF
C8
Capacitance
100nF
C9
Capacitance
100nF
C25
Capacitance
100nF
C3
Capacitance
100nF
C23
Capacitance
100nF
C4
Capacitance
100nF
C22
Capacitance
100nF
C17
Capacitance
10uF
C27
Capacitance
100nF
C20
Capacitance
10uF
C28
Capacitance
100nF
C50
Capacitance
20pF
C31
Capacitance
20pF
J2
R1
Resistance
10kΩ
R30
Resistance
33Ω
R10
Resistance
33Ω
J1
R20
Resistance
120Ω
J9
J4
R9
Resistance
33Ω
J5
J8
PS1
U2
R2
Resistance
10kΩ
J10
R3
Resistance
10kΩ
J3
U1

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Project Specification: CT04 Intelligent Control PCB
Project Overview
Status: Draft / requirements capture only — no schematic implementation approved yet.
The CT04 Control PCB is the central control board for a robotic platform. It coordinates low-voltage logic power, wired and wireless communications, local sensing, subsystem power gating, fan control, status lighting, and proactive functional-safety monitoring for Safe Torque Off (STO).
Latest User Updates Captured
  • The power supplies are not part of the Control PCB; they are located on a separate Power PCB.
  • The Control PCB receives already-regulated 5V and 24V through connectors from the Power PCB.
  • The separate Power PCB contains the DC/DC supplies. The Control PCB should be treated only as a consumer/distribution/control board receiving regulated 5V and 24V via connector(s).
  • PCB target size is approximately 260mm × 140mm.
  • Ethernet and USB connectors must be double-row / dual-row board connector or header style, similar in concept to the linked Würth Elektronik dual-row connector example.
  • Connector choices should be derived from the attached CT04 electrical drawings PDF; most connectors appear to be Molex Micro-Fit / related Molex families.
  • Current focus is the Control PCB only.
  • Planning-only remains active; no schematic or PCB implementation is authorized yet.
  • User requested staged implementation: Step 1 = MCU + Ethernet + CAN, Step 2 = LoRa + Wi‑Fi, then additional subsystems in later approved steps.
Intended Use
  • Robotic platform system controller / coordination board.
  • Prototype-to-validation schematic design focus.
  • Expected to interface with motor-drive logic, peripheral sensors, camera/LIDAR USB devices, BMS communication, CAN buses, Ethernet devices, wireless links, fans, status lighting, and STO safety loops.
  • Intended environment and compliance class are not yet confirmed.
What the Device Should Do
  • Receive regulated 5V and 24V power from the separate Power PCB through board connectors.
  • Generate local 3.3V logic rails from 5V.
  • Provide isolated power for selected communication interfaces.
  • Run an STM32F427ZI MCU as the main coordinator.
  • Provide wired communication: Ethernet switch, USB hub, RS-485/BMS link, and two CAN buses.
  • Provide wireless communication: LoRa and Wi-Fi.
  • Gate selected subsystem power rails under MCU control.
  • Drive RGB status lighting and IR LED arrays with PWM-capable constant-current / MOSFET driver stages.
  • Monitor board temperature and control cooling fans.
  • Provide redundant hardware-level STO cutout and diagnostic feedback paths.
Main Features

Table


AreaRequired Feature
Control power inputRegulated 5V and 24V supplied from external Power PCB connectors
Main 5V conversionLocated on separate Power PCB, not implemented on Control PCB
Legacy / field rail referencesPDF includes 24V_1, 5V_1, 3.3V_1, DC BUS Voltage nets; exact relationship to 54.6V input needs confirmation
Logic rail3.3V derived from 5V via local regulator(s)
Isolated rail5V_ISO / 3.3V_ISO, at least 1.5kV galvanic isolation
MCUSTM32F427ZI, 144-pin LQFP
WirelessSX1262 LoRa, TI CC3300 Wi-Fi
EthernetMicrochip KSZ8895 5-port Ethernet switch; double-row connector constraint for Ethernet connectors/headers
USBInfineon CY7C65642 USB 2.0 hub, 4 downstream ports; double-row connector constraint for USB connectors/headers
BMS serialUSB-to-RS485 bridge plus isolated RS-485 transceiver
CANOne isolated CAN slave link and one non-isolated peripheral/master CAN link
Load gatingMCU-controlled high-side switching for 24V, 12V/5V, and USB 5V subsystems as confirmed by final power architecture
ThermalI2C temperature sensors near hot zones and PWM fan drivers
SafetyDual-channel STO cutout, relay control, and diagnostic feedback
PCB sizeAbout 260mm × 140mm
System Architecture

Diagram


"Power PCB" "5V Input Connector" "24V Input Connector" "3.3V Local Regulation" "Isolated DC-DC\n5V_ISO / 3.3V_ISO" "STM32F427ZI MCU" "SX1262 LoRa" "TI CC3300 Wi-Fi" "KSZ8895 Ethernet Switch" "CY7C65642 USB Hub" "Isolated CAN Slave" "Non-Isolated CAN Master" "USB-to-RS485 BMS Link" "Subsystem Load Gating" "RGB / IR LED Drivers" "Temperature Sensors + Fan Control" "STO Relay Control + Diagnostics"
Hardware Subsystems
Power Input and Regulation
  • Control PCB power input: regulated 5V and 24V arrive from the separate Power PCB through connectors.
  • The Control PCB should not implement the 54.6V-to-5V or 54.6V-to-24V DC/DC converters.
  • Power PCB context only: DC/DC conversion from the battery/DC bus is off-board. The Control PCB must not include those DC/DC converters.
  • 5V rail target: PDF references PS 5V, 5V 5A, and 5V_1; exact continuous and peak current available at the Control PCB connector must be confirmed.
  • 24V rail: supplied from the Power PCB and used for field/output loads and gating on the Control PCB; exact current per load must be confirmed.
  • 3.3V rail: local regulation from 5V, PDF references PS 3.3V / 3.3V_1.
  • Isolated rail: isolated DC-DC converter, minimum 1.5kV isolation barrier unless changed.
  • Protection still TBD: connector input fuse/current limit, reverse-polarity protection if needed, TVS/surge protection, and separation between 5V/24V domains and isolated domains.
MCU Core
  • MCU: STM32F427ZI in 144-pin LQFP.
  • VDD: 3.3V on all VDD pins.
  • Decoupling: 100nF per VDD pin, plus appropriate bulk capacitance.
  • Analog domain: VDDA/VSSA filtered with ferrite bead.
  • HSE oscillator: 8MHz crystal, 18pF load capacitors.
  • LSE oscillator: 32.768kHz watch crystal for RTC.
  • Reference images named in source requirements: image_afe697.png, image_afe9dd.png — not yet available in this Flux project.
Wireless Communication
  • LoRa: Semtech SX1262.
    • Interface: SPI to STM32.
    • Control/interrupt lines: BUSY, DIO1, RESET routed to MCU GPIO.
    • RF: 50 ohm coplanar waveguide and matching network to SMA or IPEX antenna connector.
    • Bands: 868MHz Europe and 915MHz US support requested.
  • Wi-Fi: TI CC3300.
    • Interface: SDIO preferred, SPI as fallback option.
    • Requires bulk decoupling for TX bursts.
    • PDF also shows a “WI-FI USB Configuration” connector/interface; exact intended Wi-Fi architecture must be clarified.
Wired Communication
  • Ethernet switch: Microchip KSZ8895.
    • 5-port integrated PHY switch.
    • Host link to STM32 by MII/RMII — exact mode TBD.
    • PDF shows multiple Ethernet RJ45 ports.
    • User requires Ethernet connectors to be double-row where applicable.
  • USB hub: Infineon CY7C65642 EZ-USB HX2VL.
    • Upstream link to PC interface connector.
    • 4 downstream ports.
    • PDF shows USB-C, USB-A hub ports, and a USB-B upstream reference.
    • User requires USB connectors/headers to be double-row where applicable.
    • High-speed ESD protection required on data lines.
  • BMS serial link:
    • USB-to-serial bridge such as FT232R or CH340 from USB hub.
    • RS-485 transceiver to BMS connector.
    • PDF shows RS485 In/Out and D-SUB9 male RS485 outputs.
    • Isolation barrier required between transceiver side and logic core.
CAN Bus Architecture
  • CAN 1: isolated PC slave link.
    • Controller: STM32 internal bxCAN.
    • PDF shows CAN In/Out RJ45 and CAN Slave Isolator references.
    • Isolation: 1.5kV minimum unless changed.
    • Protection: TVS diode array.
    • Termination: 120 ohm software-selectable termination requested.
  • CAN 2: peripheral/master link.
    • Controller: second STM32 internal bxCAN.
    • PDF shows CAN Master RJ45 and CAN Master connector references.
    • Transceiver: direct non-isolated CAN transceiver unless user changes this.
    • Termination: 120 ohm physical termination requested.
Load Gating
MCU-controlled high-side switches are required for outputs shown in the requirements/PDF, including:
  • Motor / drive control logic power.
  • PC 24V output / DO_PC_24V.
  • LIDAR 24V / DO_Lidar_24V.
  • Spare 24V outputs: DO_SPARE_1_24V, DO_SPARE_2_24V, DO_SPARE_3_24V, DO_SPARE_4_24V.
  • 5V output: DO_5V_1.
  • Power control outputs: DO_Power_ON, DO_Power_Drives, DO_PTC_Switch, DO_Switch_Charging_contacts.
Target standby power limit remains less than or equal to 1W until changed. Exact loads and current limits are TBD.
Lighting and Indicators
  • RGB left/right light connectors appear in the PDF as Molex 43045-0400 4-pin connectors.
  • Signals include DO_Left_Light_R/B/G, DO_Right_Light_R/B/G, ON/OFF_Light_R/G/B, and DO_EM_Light.
  • IR LED connectors include IR_LIGHT_ANODE and IR_LIGHT_CATHODE; PDF shows Floor IR / Fork IR using 43650-0300 3-pin style and LED driver 1A notes.
Thermal Control
  • Fan connector appears as Molex 43045-0400 4-pin in the PDF.
  • Signals include FAN Power (+), DI_FAN_Feedback, and PWM fan power notes.
  • Temperature sensor references include Temperature sensor1 and Temperature Sensor2; exact sensor type and connector pinout TBD.
Functional Safety / STO
  • PDF references STO_1, STO_2, STO_1_RTN, and STO_2_RTN across several drive-control connectors.
  • Dual-channel STO remains safety-critical and requires explicit architecture confirmation before schematic implementation.
Connector Information Extracted from Attached PDF
OCR extraction from the CT04 electrical drawings PDF indicates these connector families and uses. Critical pinouts must be verified from the original PDF before schematic capture.
Power PCB ↔ Control PCB Interface Connector
User-provided interface connector image shows connector reference J8. User confirmed to use a 20-pin connector for this interface.

Table


J8 PinSignal
124V_1
224V_1
3DC BUS Voltage
4DC BUS Voltage(-)
5DI_Charger_1_Connected
6DI_Charger_2_Connected
7DI_PS1_Power_Good
8Not shown / TBD
924V_1(-)
1024V_1(-)
115V_1
125V_1(-)
13Not shown / TBD
14Not shown / TBD
15Not shown / TBD
16Not shown / TBD
17DO_Power_Drives
18DO_Switch_Charging_contacts
19DO_PTC_Switch
20DO_Power_ON
Implementation notes for this connector:
  • Pins 1–2 and 9–10 appear to parallel the 24V rail and return for higher current capacity.
  • Pins 11–12 provide the 5V rail and return from the Power PCB.
  • Pins 3–4 expose the DC bus voltage sense/reference; exact voltage-scaling and isolation/protection strategy must be defined before connecting to MCU ADC.
  • DI signals from the Power PCB should use protected digital-input conditioning before MCU pins.
  • DO signals going to the Power PCB should use appropriate output drivers / open-drain or high-side/low-side topology as required by the Power PCB input circuit.

Table


Reference / UseConnector / Part ShownNotes / Signals Seen
Panel InterfaceMolex 43045-140014-pin; panel interface signals, STO, lights, buttons
PS 5VMolex 43650-03003-pin; DO_5V_1, 5V 5A note
Left LightMolex 43045-04004-pin; RGB light signals
Right LightMolex 43045-04004-pin; 24V_1 + RGB outputs
FANMolex 43045-04004-pin; fan power and feedback
Floor IR / Fork IRMolex 43650-03003-pin; IR light anode/cathode, LED driver 1A note
2-pin in/outMolex 43045-0200Repeated 2-pin power/output connectors
Spare / sensor connectorsMolex 43045-0400 and 43045-1400DI sensors, analog inputs, I2C/PWM TBD
IGUS ConnectorMolex 43045-1200PDF shows 12-pin label but OCR also shows 10 numbered pins; verify exact pin count
Drive control connectorsMolex 43045-1000Left, right, lift, gripper drive control; STO and drive-control signals
Limit/home sensorsMolex 43045-0400Lift/gripper limit and home sensors
CAN In/OutRJ45CAN slave references; user requests double-row Ethernet/USB connectors, CAN RJ45 format TBD
CAN MasterRJ45 / connectorCAN master reference in PDF
RS485 In/OutConnector + D-SUB9 male shownRS485 +/- and GND shown
Ethernet portsRJ45Multiple Ethernet RJ45 ports shown
USBUSB-C / USB-A / USB-B upstream referencesUser requests double-row USB connectors/headers where applicable
LoRaConnector block shownExact connector/pinout TBD
LTE / CAN SlaveConnector block shownExact role TBD
Interfaces and Connections

Table


InterfaceRequirement
Control power inputRegulated 5V and 24V supplied from Power PCB connectors; connector TBD from PDF/mechanical design
5V output / PS 5VMolex 43650-0300 shown, 5V 5A note
24V / field outputsMany Molex Micro-Fit-style connectors shown, exact rail source TBD
CAN slave / isolated PC linkRJ45 shown; isolation required
CAN master / local busRJ45 / keyed connector shown
RS-485RS485 In/Out and D-SUB9 male shown
USB upstream/downstreamUSB-C, USB-A, USB-B upstream references; double-row constraint from user
EthernetMultiple RJ45 ports; double-row constraint from user
FanMolex 43045-0400 shown
STO / drive controlMolex 43045-1000 drive connectors and STO signals
Sensors / lights / sparesMolex 43045-0200 / 0400 / 1200 / 1400 and 43650-0300 references
LoRa antennaSMA or IPEX/U.FL connector still TBD
Screw terminals remain prohibited. Pluggable keyed connectors are required, with Molex Micro-Fit / related Molex families preferred based on the PDF.
Power and Runtime Expectations
  • Control PCB input: regulated 5V and 24V from the separate Power PCB.
  • 5V rail: PDF references 5V 5A; final supply capability and derating must be confirmed against DC2468A configuration.
  • 3.3V load current is not yet defined.
  • Isolated rail load current is not yet defined.
  • PDF references many 24V_1 loads and 24V 3A notes; on the Control PCB this 24V is treated as an incoming rail from the Power PCB and may be passed through or gated to loads.
  • Standby target: less than or equal to 1W, enforced partly by load gating unless changed.
Power Tree and Power Budget

Diagram


"Power PCB\n54.6V→5V and 54.6V→24V converters" "5V Input to Control PCB" "24V Input to Control PCB" "5V Input Protection\nTBD fuse / TVS / reverse protection" "24V Input Protection\nTBD fuse / TVS / reverse protection" "5V Control Rail" "USB Port Power\n4 downstream ports" "Status / IR LED Drivers" "Fan Power" "Local 3.3V Regulation" "STM32 + Local Logic" "LoRa + Wi-Fi" "Isolated DC-DC" "5V_ISO" "3.3V_ISO" "24V_1 Field Rail" "Gated node_24V Outputs"
Open power-budget items before schematic implementation:

Table


RailKnown LoadsMissing Information
5V input from Power PCBUSB hub ports, LDO input, isolated DCDC input, logic loads as applicableConnector pinout, fuse/current limit, max continuous/peak current from Power PCB
5VUSB hub ports, LEDs, fans, LDO input, isolated DCDC inputConfirm 5A target, USB per-port current, fan count/current, LED/IR current
3.3VSTM32, CC3300, SX1262, logic gatesWi-Fi peak current, MCU current mode, peripheral logic current
5V_ISO / 3.3V_ISOIsolated CAN and RS-485 sidesNumber of isolated channels, transceiver current, field-side connector loads
24V_1 input from Power PCBDrive controls, PC 24V, LIDAR 24V, sensors, spare outputsCurrent per output, which 24V supply feeds each load, fuse/current-limit strategy
Manufacturing and Assembly Expectations
  • Screw terminals prohibited.
  • Molex Micro-Fit / related Molex connectors preferred based on PDF.
  • Ethernet and USB connectors must be double-row where applicable.
  • Four Ethernet switch ports use RJ45 connectors with integrated magnetics.
  • Target board size: about 260mm × 140mm.
  • High-speed routing requirements imply likely 4-layer or higher PCB; final layer count TBD.
  • Controlled-impedance routing required for USB, Ethernet, and RF.
  • Isolation spacing: at least 2mm keepout between GND_SYSTEM and GND_ISO across all layers unless isolation standard requires more.
  • Assembly preference, manufacturer, and package constraints are TBD.
Firmware-Relevant Hardware Requirements
  • STM32F427ZI firmware must control:
    • power-gating outputs,
    • fan PWM outputs,
    • RGB/IR LED PWM outputs,
    • STO relay outputs,
    • CAN interfaces,
    • Ethernet host link,
    • USB hub control/status as required,
    • LoRa SPI,
    • Wi-Fi SDIO/SPI or USB configuration path if selected,
    • I2C temperature sensors.
  • Required debug/programming interface not yet specified; SWD header is assumed but must be confirmed.
  • Boot/reset controls not yet specified.
  • PDF includes the note “How to automatic Upgrate CPU FW? Needed??” — firmware upgrade method must be decided.
Physical Design Expectations
  • Board size target: approximately 260mm × 140mm.
  • Mounting holes: TBD.
  • Enclosure assumptions: TBD.
  • Connector edge placement: TBD.
  • Antenna placement and keepout: required for LoRa and Wi-Fi; exact mechanical constraints TBD.
  • Isolation boundary: physical keepout of at least 2mm between system and isolated grounds.
Layout and Routing Requirements
  • Ethernet differential pairs: 100 ohm differential impedance, symmetrical routing, avoid vias where possible.
  • USB D+/D-: 90 ohm differential impedance, stubs under 2mm.
  • RF path: 50 ohm coplanar waveguide to antenna connector with continuous ground reference and dense via stitching.
  • The 54.6V/DC-bus conversion area is not on the Control PCB. Any DC-bus voltage sense lines entering the Control PCB still require appropriate connector clearance, protection, scaling, and isolation/safety review.
  • Ground domains:
    • GND_SYSTEM: MCU, wireless, regulators, local logic.
    • GND_ISO: isolated CAN slave and BMS RS-485 field side.
    • Maintain at least 2mm clearance between GND_SYSTEM and GND_ISO on all layers with no overlapping traces unless a different safety/EMC requirement is chosen.
Important Design Decisions Captured So Far
  • Main MCU direction: STM32F427ZI, 144-pin LQFP.
  • Main 5V and 24V power conversion is off-board on the Power PCB; Control PCB receives regulated 5V and 24V through connector(s) and only handles local regulation/distribution/protection.
  • Wi-Fi direction: TI CC3300, with PDF showing possible USB configuration path.
  • LoRa direction: Semtech SX1262.
  • Ethernet direction: Microchip KSZ8895.
  • USB hub direction: Infineon CY7C65642.
  • PCB target size: about 260mm × 140mm.
  • No screw terminals; use keyed Molex Micro-Fit / related connectors where possible.
  • Ethernet and USB connectors must be double-row where applicable.
  • Isolation required for selected CAN and RS-485 links.
  • Controlled impedance is mandatory for USB, Ethernet, and RF.
Staged Implementation Plan
Implementation will proceed in approved steps. Each step should first produce/confirm the schematic plan, then implement, then run ERC/design review before moving on.
Step 1 — MCU + Ethernet + CAN Base Bring-Up
Scope:
  • STM32F427ZI core circuit: 3.3V power pins, decoupling, VDDA filtering, reset, BOOT configuration, HSE/LSE clocks, SWD programming/debug header.
  • Local 5V-to-3.3V regulation required for the MCU and communication logic.
  • Ethernet block using KSZ8895 reference/eval schematic as the starting point.
  • Ethernet topology confirmed: use the KSZ8895 as a 4-port external Ethernet switch, with the additional switch port connected to the STM32 Ethernet MAC.
  • Ethernet host interface between STM32 and KSZ8895 confirmed as RMII.
  • Four external Ethernet ports will use RJ45 connectors with integrated magnetics.
  • CAN block using STM32 internal CAN controllers:
    • one isolated CAN slave/PC link,
    • one non-isolated CAN master/peripheral link unless changed.
  • Slave CAN uses TI ISO1042DWEVM / ISO1042-based isolated CAN design, quantity 1 unit.
  • Master CAN is non-isolated.
  • ISO1042 isolated CAN field side will be powered from isolated 5V generated locally on the Control PCB from J8 5V.
  • CAN connector style confirmed as RJ45 with pinout: pin 1 = CAN_H, pin 2 = CAN_L, pin 3 = GND.
  • CAN termination confirmed: master CAN port requires 120Ω termination; slave CAN port has no termination.
  • CAN protection and isolated power domain as required.
Step 1 open decisions before implementation:
  1. Ethernet topology confirmed: 4 external switch ports plus one MCU Ethernet uplink using RMII.
  2. Ethernet connector style confirmed: RJ45 connectors with integrated magnetics for the four external Ethernet ports.
  3. CAN connector confirmed as RJ45: pin 1 CAN_H, pin 2 CAN_L, pin 3 GND.
  4. CAN termination confirmed: fixed 120Ω on master CAN, no termination on slave CAN.
  5. Confirmed: only slave CAN is isolated; its ISO1042 isolated side receives isolated 5V generated locally on the Control PCB from J8 5V. Master CAN is non-isolated.
Step 2 — Wireless: LoRa + Wi‑Fi
Scope:
  • SX1262 LoRa reference/eval schematic adapted to the CT04 board.
  • LoRa SPI/control lines to STM32, RF matching network, RF switch/filter if required, and SMA or U.FL/IPEX antenna connector.
  • TI CC3300 Wi‑Fi reference/eval schematic adapted to the CT04 board.
  • Wi‑Fi interface to STM32: SDIO preferred unless the final module/reference design requires another interface.
  • RF layout constraints: antenna keepout, 50Ω RF feed, ground stitching, and separation from Ethernet/USB noise sources.
Step 2 open decisions before implementation:
  1. Confirm LoRa region/frequency: 868MHz, 915MHz, or dual population option.
  2. Confirm LoRa antenna connector: SMA, U.FL/IPEX, or external cable connector.
  3. Confirm whether Wi‑Fi is CC3300 bare IC/module and whether antenna is onboard or external.
  4. Confirm if the PDF's Wi‑Fi USB configuration path is required or only a service/programming option.
Proposed Later Steps
  1. USB hub + USB/RS‑485/BMS communication.
  2. Power-input connectors, protection, monitoring, and 5V/24V distribution.
  3. 24V/5V load gating outputs and connector pinout reconstruction from the PDF.
  4. Sensors, fans, RGB/IR lighting, and panel interface.
  5. STO safety monitoring/control architecture after explicit safety requirements are confirmed.
  6. PCB floorplanning, stackup, connector placement, controlled-impedance routing, and final DRC/ERC review.
Assumptions
  • This file is a planning/specification file only; no implementation is authorized until the user answers clarification questions and approves a schematic plan.
  • The PDF OCR may contain errors; critical connector part numbers and pinouts must be verified against the original drawing before schematic capture.
  • 4-layer PCB is likely the minimum practical stackup due to RF, USB, Ethernet, 24V distribution, isolation, and ground-plane requirements, but this is not yet approved.
  • Safety-related STO circuitry will require explicit architecture confirmation before design.
Clarification Questions Before Implementation
  1. Confirm J8 connector physical part number/series for the 20-pin Power PCB ↔ Control PCB interface.
  2. What are the maximum available currents from the Power PCB for the 5V rail and 24V rail at the Control PCB connector?
  3. Confirmed: the Control PCB receives separate 24V rails for PC power and other components.
  4. Confirm the 5V rail target delivered to the Control PCB: is it 5V 5A as the PDF suggests, or another current?
  5. Can you provide the connector pinout table from the original CAD/PDF, or should I manually reconstruct pinouts from the PDF OCR and ask you to verify each one?
  6. Which exact Molex connector series should be standardized: Micro-Fit 3.0, Mini-Fit, Micro-Lock, or the exact part numbers shown such as 43045-xxxx and 43650-xxxx?
  7. For Ethernet/USB “double row”: do you mean stacked/double-deck connectors, dual-row board headers, or two-row pin headers for cable harnesses?
  8. How many Ethernet RJ45 ports and USB downstream ports are final?
  9. Should USB downstream connectors be USB-A, cable headers, or both?
  10. What are the mounting-hole locations, connector edge placement requirements, and keepout zones for the 260mm × 140mm PCB?
  11. Should the board be 4-layer, 6-layer, or another stackup?
  12. For STO: what safety category / PL / SIL target, relay part preference, and exact external safety-loop behavior are required?
  13. Do you want me to keep staying planning-only until you explicitly say “implement schematic”?
Change Notes
  • Initial project specification created from user-provided pasted requirements on 2026-06-29.
  • Corrected power architecture: DC/DC supplies are on the separate Power PCB; Control PCB receives regulated 5V and 24V through connectors and must not implement battery/DC-bus DC/DC converters.
  • User confirmed J8 should be implemented as a 20-pin Power PCB ↔ Control PCB interface connector.
  • User confirmed the Control PCB receives separate 24V rails for PC power and general components.
  • Added staged implementation plan: Step 1 MCU + Ethernet + CAN, Step 2 LoRa + Wi‑Fi, followed by USB/RS‑485, power distribution, load gating, sensors/fans/lights, STO, and PCB layout.
  • Step 1 updates: Ethernet confirmed as 4 external switch ports plus MCU uplink; CAN RJ45 pinout confirmed as pin 1 CAN_H, pin 2 CAN_L, pin 3 GND; master CAN has 120Ω termination and slave CAN has no termination.
  • Step 1 update: STM32-to-KSZ8895 host Ethernet interface confirmed as RMII.
  • Step 1 update: four Ethernet ports use RJ45 connectors with integrated magnetics; isolated CAN reference is TI ISO1042DWEVM / ISO1042-based design for slave CAN only, quantity 1 unit.
  • Step 1 update: only slave CAN is isolated using one ISO1042-based channel; master CAN is non-isolated. Step 1 uses 5V from J8. Common Flux/library parts may be selected during implementation when exact MPNs are not specified.
  • No schematic, components, or PCB layout have been created yet.
  • Project Overview

  • Latest User Updates Captured

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Power Input and Regulation

  • MCU Core

  • Wireless Communication

  • Wired Communication

  • CAN Bus Architecture

  • Load Gating

  • Lighting and Indicators

  • Thermal Control

  • Functional Safety / STO

  • Connector Information Extracted from Attached PDF

  • Power PCB ↔ Control PCB Interface Connector

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Layout and Routing Requirements

  • Important Design Decisions Captured So Far

  • Staged Implementation Plan

  • Step 1 — MCU + Ethernet + CAN Base Bring-Up

  • Step 2 — Wireless: LoRa + Wi‑Fi

  • Proposed Later Steps

  • Assumptions

  • Clarification Questions Before Implementation

  • Change Notes

Documents

  • Project Specification: CT04 Intelligent Control PCB

  • Step 1 Schematic Implementation Plan — MCU + Ethernet + CAN

  • Step 1 Implementation Review — MCU + Ethernet + CAN

  • Firmware Starter — STM32F427ZIT6

  • Step 1 Board Bring-Up Plan — MCU + Ethernet + CAN

Assets

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CT04 Intelligent Control PCB

CT04 Intelligent Control PCB thumbnail
Control PCB for a robotic platform with 24V input, STM32F427ZI coordination, Ethernet/USB/CAN/RS-485/wireless interfaces, load gating, thermal control, and STO safety monitoring.

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