Fixing Missing Footprint Error

Here’s what I found for U8:
What U8 currently says in your project

Table


ItemValue
PartEM4305
ManufacturerEM Microelectronic
MPNEM4305
Package propertyEM4205_EM4305_EMDFN02
Package codeEMDFN-02
Footprint propertyEM4205_EM4305_EMDFN02
Datasheet findings
From the official datasheet for EM4305:

Table


Datasheet itemValue
Package nameEMDFN02
Package style2 leads Plastic Package
Body size2.20 mm x 1.78 mm
Thickness0.76 mm
Tolerance noteAll dimensions in mm
Pin / pad mapping found in the datasheet

Table


Pad nameDatasheet description
Coil 2Coil connection 2
TestTest purpose, NC, active pad
V test 1Test purpose, NC, active pad
V test 2Test purpose, NC, active pad
Coil 1Coil connection 1
What this means
The likely root problem is not just missing geometry. The part definition behind U8 appears incomplete.
The library entry for EM4305 is showing 0 terminals, which strongly suggests the part project does not have a valid symbol/terminal-to-footprint setup yet. That would absolutely cause a Missing Footprints-type failure even if a text property says “Footprint”.
What to fix in the part project
For the part project of EM4305, make sure it has:

Table


Required fixWhat to check
Footprint assetA real footprint object exists, not just a footprint property string
TerminalsThe part has actual terminals defined
Terminal mappingEach terminal is mapped to the correct footprint pad
Package choiceConfirm whether you want the 2-lead EMDFN02 package or a bumped-die style implementation
Recommended next step
In the part project, verify these exact terminal mappings first:

Table


Logical terminalMap to footprint pad
Coil 1Coil 1
Coil 2Coil 2
And if you include the test pads in the footprint, keep them as NC / non-user terminals unless your exact package variant requires otherwise.
If you want, I can now give you a click-by-click checklist for rebuilding the footprint and remapping the terminals for U8.
Clean up U8's terminals so Coil 1 and Coil 2 map correctly, and leave test pads as NC.
I can take care of that for U8: clean up its terminal properties so Coil 1 and Coil 2 are the functional terminals, and leave the test pads as NC.
If you want, apply the change and I’ll handle that specific update.
U8
U2
U4
C3
Capacitance
100nF
U1 PB6 - U3 SCL/SPC
U5 ~{STDBY} - R9 P1
U1 PA10 - U2 RXD
U2 1PPS - R6 P1
U1 BOOT0 - R5 P1
U4 SPI_CLK - U1 PA5
U5 PROG - R3 P1
U1 OSCIN/PF0 - X1 OSC1
C5
Capacitance
100nF
U1 NRST - R4 P1
U5 ~{CHRG} - R8 P1
U4 SPI_SIMO - U1 PA7
U4 BUSY - U1 PA4
C4
Capacitance
100nF
U5 VCC - U5 CE
U5 ~{STDBY} - R9 P1
U5 ~{CHRG} - R8 P1
U2 1PPS - R6 P1
C9
Capacitance
10uF
U1 PA13 - J2 SWDIO/TMS
U4 EOB - U1 PA1
U3 VDD_IO - U1 PA9
U4 SPI_SOMI - U1 PA6
U1 VDD - U1 VDD
U2 RF_IN - ANT1 FEED
U2 1PPS - R6 P1
U3 VDD_IO - U1 PA9
C8
Capacitance
100nF
C6
Capacitance
100nF
U5 VCC - U5 CE
U2 ANTON - C14 P1
U3 INT2 - U1 PB2
U1 PB6 - U3 SCL/SPC
U3 VDD_IO - U1 PA9
C2
Capacitance
100nF
U1 PA13 - J2 SWDIO/TMS
Q1 D - U2 RSTN
U2 1PPS - R6 P1
C1
Capacitance
100nF
J1 P1 - U5 BAT
U1 NRST - R4 P1
U1 VDD - U1 VDD
U1 PA14 - J2 SWDCLK/TCK
U4 VCL - C7 P1
U3 INT1 - U1 PB1
U2 1PPS - R6 P1
U1 PB7 - U3 SDA/SDI/SDO
U3 VDD_IO - U1 PA9
U1 OSCOUT/PF1 - X1 OSC2
U3 VDD_IO - U1 PA9
C13
Capacitance
12pF
U3 VDD_IO - U1 PA9
U2 VBKP - U2 FORCE_ON
U1 NRST - R4 P1
C7
Capacitance
100nF
U1 PA14 - J2 SWDCLK/TCK
U1 NRST - R4 P1
U5 VCC - U5 CE
U3 INT2 - U1 PB2
U4 NPOR - U1 PA3
U1 VDD - U1 VDD
J1 P1 - U5 BAT
C12
Capacitance
12pF
U2 VBKP - U2 FORCE_ON
U1 VDD - U1 VDD
U1 PB7 - U3 SDA/SDI/SDO
U1 VDD - U1 VDD
U1 PB6 - U3 SCL/SPC
U1 PA10 - U2 RXD
U1 OSCIN/PF0 - X1 OSC1
J1 P1 - U5 BAT
U4 CLK_AM - U1 PA11
C10
Capacitance
10uF
C11
Capacitance
10uF
U3 VDD_IO - U1 PA9
U1 BOOT0 - R5 P1
U1 OSCOUT/PF1 - X1 OSC2
C14
Capacitance
10nF
U5 PROG - R3 P1
U1 OSCOUT/PF1 - X1 OSC2
U5 VCC - U5 CE
U5 VCC - U5 CE
U3 INT1 - U1 PB1
U1 VDD - U1 VDD
U1 OSCIN/PF0 - X1 OSC1
U3 VDD_IO - U1 PA9
U3 VDD_IO - U1 PA9
U4 VBATI - TP1
U1 PA2 - U2 TXD
U3 VDD_IO - U1 PA9
U3 VDD_IO - U1 PA9
U1 PB7 - U3 SDA/SDI/SDO
J2 GND - U6 1
GND
GND
U3 SDO/SA0 - U4 PUSH
J2 GND - U6 1
J2 GND - U6 1
C14 P2 - U4 EP
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
U3 GND - U4 GND
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
GND
J2 GND - U6 1
GND
J2 GND - U6 1
GND
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
GND
J2 GND - U6 1
J2 GND - U6 1
U2 GND - J2 GND
GND
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
J2 GND - U6 1
TP4
R1
Resistance
4.7kΩ
TP6
R2
Resistance
4.7kΩ
U5
R9
Resistance
10kΩ
R6
Resistance
100kΩ
J1
Q1
Not Recommended for New Designs
R5
Resistance
100kΩ
R4
Resistance
10kΩ
R8
Resistance
10kΩ
TP1
U6
TP5
X1
J2
TP3
R7
Resistance
100 Ω
U1
R3
Resistance
2kΩ
TP2
U3
ANT1

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