EMG Board Design Specifications


  • Added 11x Generic Resistor as R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11 (Pins: P2, P1)
  • Added 26x Generic Capacitor as C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26 (Pins: P1, P2)
  • Added 1x VLS252012HBX-2R2M-1 as L1 (Pins: P1, P2)
  • Added 1x LQP15MN3N9B02D as L2 (Pins: 1, 2)
  • Added 1x ANT016008LCS2442MA1 as AE1 (Pins: DUMMY_PAD_1, FEED_POINT, DUMMY_PAD_2, RADIATOR_ELECTRODE)
Work done
  • Reviewed datasheets and pin mapping for the main blocks: U1, U2, U3, IC1, and U4
  • Confirmed connector and clock resources for J1, J2, J3, J4, J5, Y2, and Y3
  • Added the missing support passives and RF parts needed to complete the design, including the buck inductor L1, RF matching inductor L2, and antenna AE1
  • Resolved several implementation details from datasheets, including the ADS1298 input/power pins, BQ24075 charger strap guidance, nRF52840 decoupling requirements, USBLC6 line mapping, and candidate Nordic RF match values
Success criteria review
  • ✅ The major functional blocks are selected and present in the schematic: EMG AFE, MCU, USB/charging, battery input, buck regulator, and external connectors
  • ✅ Key supporting components for power, clocks, I2C pull-ups, USB-C CC resistors, and RF matching were added
  • ❌ The schematic is not yet wired: nets are still incomplete, so SPI, I2C, EMG inputs, USB, charger, and power rails are not fully implemented
  • ❌ The layout stage is not yet completed: the 6-layer stackup, 50 ohm RF guidance, placement, and manufacturability checks still need to be applied
  • ❌ Final clarification-dependent items are still open in practice: the U3 VSET selection should be finalized against the datasheet table, and the U2 to AE1 RF matching values should be aligned to the Nordic reference for the chosen antenna/layout
Next steps
I am blocked by credit exhaustion, so I cannot make more project changes in this run. The next concrete steps are to wire the full schematic around U1, U2, U3, IC1, J1, J3, and J4; correct any remaining value mismatches; then proceed to PCB layout setup with the required 6-layer stackup, board sizing, and component placement.

Project Specification - Wearable EMG Acquisition PCB
Scope
Design a wearable EMG acquisition PCB with 8 differential biopotential channels through a 16-position flex connector, BLE/USB processing, USB-C charging, LiPo battery power, a 3.3 V buck rail, and a 2.4 GHz antenna path suitable for JLC 6-layer layout.
System Architecture

Diagram


SPI I2C EMG flex connector\n8 differential pairs Biopotential AFE and ADC BLE MCU with native USB I2C power flex connector USB-C connector USB protection LiPo charger with power path LiPo battery connector 3.3 V buck regulator RF resistor and matching network 2.4 GHz chip antenna
Selected Architecture Defaults
  • AFE/ADC architecture: ADS1298-class 8-channel biopotential AFE with integrated PGA, simultaneous sampling, SPI interface, and lead-off based impedance checking.
  • MCU architecture: bare nRF52840 with native USB and external 32 MHz plus 32.768 kHz crystals.
  • USB role: charging plus native USB device/debug data.
  • Charge and power path: BQ24075 charger/power-path device feeding a dedicated 3.3 V buck regulator.
  • Main 3.3 V rail: TPS62840 configured for 3.3 V from charger SYS / battery domain.
  • RF path: nRF ANT pin through a small series resistor and a 3-element tunable matching network into a 2.4 GHz chip antenna.
  • EMG connector mapping: 16 signal pins used as 8 differential pairs, one pair per ADS1298 channel.
  • External 4-pin flex mapping: GND, 3.3 V, I2C SDA, I2C SCL.
Functional Blocks
  • EMG input flex connector and direct differential routing into the AFE.
  • ADS1298 analog front end with reference, VCAP, and lead-off support.
  • nRF52840 BLE/USB subsystem with crystals, decoupling, SWD reserve pins, and SPI host connection.
  • USB-C sink input with CC pull-downs and ESD protection.
  • Single-cell LiPo charger, battery connector, SYS rail, and 3.3 V buck converter.
  • RF feed with resistor placeholder, matching pads, and chip antenna.
Pin Mapping Intent
  • EMG channels map sequentially from connector J3 pins 1-16 to CH1P/CH1N through CH8P/CH8N.
  • SPI between MCU and AFE uses dedicated MCU GPIOs plus DRDY and START control.
  • External I2C connector is sourced by the MCU and shares one pull-up pair to 3.3 V.
  • USB D+ and D- route directly between the USB connector protection device and the MCU USB pins.
PCB Intent
  • Target a JLC-compatible 6-layer stackup.
  • Keep the EMG connector and AFE in a quiet analog zone away from the buck and USB charger.
  • Keep the antenna at a board edge with full keepout under and around the RF section.
  • Route the RF feed as a short 50 ohm coplanar structure with adjacent ground stitching.
  • Place USB-C and battery connector on opposite edges to reduce power-noise coupling into the analog front end.
Open Engineering Decisions Resolved For This Revision
  • Impedance checking will use ADS1298 lead-off capability rather than adding a second analog front end.
  • RF matching will use a tunable placeholder network with default population based on the Nordic reference design, then be optimized in bring-up if needed.
  • The design uses the 16-pin EMG flex only for the 8 differential inputs and does not allocate extra pins for driven-reference electrodes in this revision.
  • Scope

  • System Architecture

  • Selected Architecture Defaults

  • Functional Blocks

  • Pin Mapping Intent

  • PCB Intent

  • Open Engineering Decisions Resolved For This Revision