Project Discussion Assistance

flux

For U1, the datasheet confirms the required logic states at reset for these strapping pins, but it does not give a specific external resistor value. A standard, safe recommendation is 10 kOhm external pulls.
Recommended wiring for U1 strapping pins

Table

Pin on U1Required reset state from datasheetRecommended resistorWiring
GPIO12 / MTDILow at power-up10 kOhm Generic ResistorGPIO12 -> resistor -> GND
GPIO5Default state is pull-up / 110 kOhm Generic ResistorGPIO5 -> resistor -> 3V3
GPIO15 / MTDODefault state is pull-up / 110 kOhm Generic ResistorGPIO15 -> resistor -> 3V3
Datasheet basis

Table

PinDatasheet statement
GPIO12 / MTDIMust be kept low during power-up; MTDI=0 keeps VDD_SDIO at 3.3 V
GPIO5Strapping pin with internal weak pull-up
GPIO15 / MTDOStrapping pin with internal weak pull-up
Why 10 kOhm
  • The datasheet says strap states can be overridden with external pull-up/pull-down resistances.
  • Internal pulls are typically 45 kOhm.
  • 10 kOhm is a common strong-enough external value to dominate the internal weak pull and improve noise immunity.
Exact net intent

Table

New resistor functionConnect between
Pull-down for GPIO12U1 GPIO12 and GND
Pull-up for GPIO5U1 GPIO5 and 3V3
Pull-up for GPIO15U1 GPIO15 and 3V3
If you want, I can next give you the matching fix for U6 as a short wiring checklist too.
CCS811 wiring checklist
Check missing pull resistors
Add resistor designators
U4
U6 ADDR - U5 VH-
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
GND
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
U6 ADDR - U5 VH-
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
R9 P2 - J4 1
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
GND
U6 ADDR - U5 VH-
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
U6 ADDR - U5 VH-
J1 SHIELD__3 - J2 P2
R9 P2 - J4 1
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
J1 SHIELD__3 - J2 P2
U3 VOUT - U1 VDD
U1 EN - R5 P2
U3 VOUT - U1 VDD
R10 P2 - J4 2
U1 EN - R5 P2
U1 IO0 - R8 P1
U1 EN - R5 P2
U1 SENSOR_VP - U5 A1
U2 STAT - R7 P1
U3 VOUT - U1 VDD
U1 IO22 - U4 SCL_Vz
U1 TXD0/IO1 - R10 P1
U3 VOUT - U1 VDD
J1 V-BUS__1 - U2 VIN
U3 VOUT - U1 VDD
R11 P2 - J4 3
J1 CC1 - R1 P1
U1 IO34 - J3 1
U2 PROG - R6 P1
U1 IO34 - J3 1
U1 IO21 - U4 PWM_SDA
U1 IO22 - U4 SCL_Vz
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U1 EN - R5 P2
U3 VOUT - U1 VDD
U2 PROG - R6 P1
U1 RXD0/IO3 - R11 P1
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U1 TXD0/IO1 - R10 P1
U3 VOUT - U1 VDD
U1 IO21 - U4 PWM_SDA
U1 IO22 - U4 SCL_Vz
U3 VOUT - U1 VDD
J1 CC2 - R2 P1
U3 VOUT - U1 VDD
R10 P2 - J4 2
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U2 STAT - R7 P1
J1 CC1 - R1 P1
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U3 VOUT - U1 VDD
U1 IO2 - R9 P1
J1 V-BUS__1 - U2 VIN
U3 VOUT - U1 VDD
U1 IO2 - R9 P1
U1 SENSOR_VN - J3 2
R11 P2 - J4 3
U1 IO21 - U4 PWM_SDA
U1 RXD0/IO3 - R11 P1
U3 VOUT - U1 VDD
U1 IO22 - U4 SCL_Vz
U3 VOUT - U1 VDD
U1 SENSOR_VP - U5 A1
U3 VOUT - U1 VDD
J1 CC2 - R2 P1
J1 V-BUS__1 - U2 VIN
U1 SENSOR_VN - J3 2
U1 IO21 - U4 PWM_SDA
U1 IO0 - R8 P1
U3 VOUT - U1 VDD
U6
R11
Resistance
100 Ω
R10
Resistance
100 Ω
U1
R8
Resistance
10kΩ
J2
J1
U5
C2
Capacitance
10uF
C4
Capacitance
100nF
R6
Resistance
10kΩ
C8
Capacitance
100nF
R2
Resistance
5.1kΩ
R3
Resistance
4.7kΩ
C1
Capacitance
10uF
R9
Resistance
10kΩ
R5
Resistance
10kΩ
C9
Capacitance
100nF
C3
Capacitance
10uF
C7
Capacitance
100nF
C6
Capacitance
100nF
R7
Resistance
1kΩ
R4
Resistance
4.7kΩ
C5
Capacitance
100nF
R1
Resistance
5.1kΩ
U3
U2
J3
J4

No files yet

Documents

    Documents are markdown text files which describe project goals, capture details, or even simulation outputs.

    Assets

    Assets are files uploaded to this project which can be used in various ways.

    Something went wrong loading this panel.