회로 구성 설명

아래는 Flux 공식 문서의 설명입니다.
How can I label nets or create named connections in the schematic?
Use net portals by placing a portal symbol on a wire and entering the desired net name. Any portal sharing that name will automatically connect the nets. Learn more in the Schematic – Net Portals guide.
이 회로의 총 소비전력은 얼마인가요?
총 소비전력을 계산하려면 외부 전원(VCC)의 전압을 알아야 합니다.
예: 5 V, 3.3 V 등 어떤 전압을 공급하시는지 알려주시겠습니까?
5v
회로의 총 소비전력(약 5 V 입력 기준)은 두 블록 소비 전류의 합으로 계산할 수 있습니다.
  1. AP2112K-3.3 LDO 쿼이스전트: 55 µA
  2. VL53L0X 활성 측정 평균: 19 mA
  • LDO quiescent 전력:
    PQ=VIN×IQ=5 V×55 µA=0.000275 WP_{Q} = V_{IN} \times I_Q = 5\text{ V} \times 55\text{ µA} = 0.000275\text{ W}
  • 센서 작동 전력:
    PS=VIN×Iactive=5 V×19 mA=0.095 WP_{S} = V_{IN} \times I_{active} = 5\text{ V} \times 19\text{ mA} = 0.095\text{ W}
  • 총 소비전력:
    Ptotal=PQ+PS=0.000275 W+0.095 W=0.0953 WP_{total} = P_{Q} + P_{S} = 0.000275\text{ W} + 0.095\text{ W} = \mathbf{0.0953\text{ W}}
Lower quiescent LDO
Add decoupling caps
Estimate battery life
Thermal dissipation LDO
3.3V net class
SDA
GPIO
C3
Capacitance
100nF
XSHUT
C1
Capacitance
4.7uF
Q1
SDA_3V
GPIO
SCL
XSHUT
C5
Capacitance
0.1uF
SDA_3V
C2
Capacitance
10uF
SCL_3V
SCL_3V
SCL_3V
SDA
C4
Capacitance
10uF
SCL
SDA
SCL
SDA_3V
Q2
VCC
+3V3
IC1
R1
Resistance
10kΩ
VCC
U2
R4
Resistance
10kΩ
+3V3
R2
Resistance
10kΩ
+3V3
+3V3
J3
R3
Resistance
10kΩ
J2
+3V3
VCC
VCC
+3V3
VCC
+3V3
+3V3
+3V3
+3V3
J4

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    VL53L0X Reference Design.png

    VL53L0X Reference Design.png

    VL53L0X Reference DesignThumbnail

    VL53L0X Reference Design

    VL53L0X Reference Design thumbnail
    This project is a reference design for the VL53L0X time-of-flight ranging sensor from STMicroelectronics. The circuit includes a voltage regulator, level shifting for I2C communication, and connections for various GPIOs, all catering to proper operation of the sensor. #industrialSensing #ReferenceDesign

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