Set PCB Board Shape
Worked for 1 min 50 sec
Completed
- Extracted the external closed polygon from
gemini-board-outline.svg. - Converted SVG coordinates to Flux’s meter-based, Y-up custom outline format.
- Applied the custom non-rectangular board outline.
- Preserved the native 100 mm × 79 mm dimensions and aspect ratio.
- Preserved the JLC7628 4 Layer stackup.
- Did not move components or modify routing.
Verification
- Layout reports
boardShape = svgPath(...), notrectangle. - Rendered outline is labeled 100 mm × 79 mm (custom) with extents X: −50…50 mm, Y: −39.5…39.5 mm.
- Routing state remains at 127 airwires, 0 dangling traces.
Remaining issue
- The new silhouette leaves 14 existing components outside the board:
R12, C37, R11, R13, R17, H2, C26, C27, C33, F1, U2, C30, C14, C34. They were not moved because placement changes were explicitly out of scope.
Thought for 17 sec
Board shape set from the SVG at 100 × 79 mm, preserving the JLC7628 4-layer stackup.
Open item: 14 existing components are outside the new outline and need repositioning.
Fix placement and DRC
Move outside components
Run layout DRC
Preserve connector alignment
Check mounting clearance
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Ask about this doc
Schematic Design Review
Project: VS-Jetson Orin Audio HAT
Review date: 2026-07-27
Scope: Current live schematic only, after the recent amplifier-input and ES8388 decoupling changes.
Review date: 2026-07-27
Scope: Current live schematic only, after the recent amplifier-input and ES8388 decoupling changes.
Executive Summary
The recent changes resolved the two most significant electrical findings:
- R1/R3 = 68 kΩ and R29/R30 = 1 kΩ now provide suitable attenuation between the ES8388 and TDA2822D.
- C23 adds the second 10 µF bulk capacitor to the ES8388 AVDD/HPVDD filtered supply.
No incorrect net connection, single-pin net, power-pin omission, output polarity error, or digital-interface direction error was found in the current schematic. Remaining findings are primarily one TDA2822D application-circuit deviation, host-symbol correctness, external-interface protection, and incomplete passive metadata.
Confirmed Open Findings
1. Medium — TDA2822D inverting-input bypass capacitors differ from the characterized stereo circuit
Observed connectivity
- IC1
INPUT-(1)connects through C2 = 47 µF to GND. - IC1
INPUT-(2)connects through C4 = 47 µF to GND.
Datasheet reference
The TDA2822D stereo application and test circuit uses 100 µF from each inverting input to GND, with the positive terminal toward the IC input.
Impact
The low-frequency closed-loop response is not the same as the datasheet-characterized circuit. C2 and C4 are also generic non-polarized 1206 parts without explicit voltage rating or DC-bias data.
Correction
Use 100 µF polarized capacitors, positive toward IC1 pins 8 and 5 and negative to GND. If 47 µF is intentionally retained, validate the resulting low-frequency response and assign a real part whose effective capacitance is adequate at the operating bias.
2. Medium — Host connector symbol uses incorrect platform-specific pin names
Observed state
The host connector is
Pin Socket 02x20 for Rpi 5, designator Rpi 5_1, although the board targets the Jetson Orin Nano J12 header. The symbol uses Raspberry Pi names such as GPIO_18, GPIO_19, and DNC.The physical pins currently used for I²C, MCLK, I²S, and PTT are valid Jetson header pins. However, physical pins 27 and 28 are labeled
DNC in the symbol even though NVIDIA defines them as I2C0_SDA and I2C0_SCL, and the remaining GPIO names are not Jetson signal names.Impact
Current connectivity works by physical pin number, but the symbol can cause future assignment errors and makes Jetson-IO, device-tree, firmware, and test documentation ambiguous.
Correction
Replace it with a Jetson Orin Nano J12-specific 2×20 symbol, preserving physical pin numbers and using NVIDIA’s official signal names. Rename the reference to
J12 or another connector-style designator.3. Medium — H1/H2 external signal pins have no ESD clamps
Observed state
H1 and H2 expose microphone input, PTT/GPIO, speaker output, GND, and protected +5 V. No TVS or ESD-protection component is present. D1/D2 are series Schottky diodes on the +5 V branches and do not clamp the signal lines.
Impact
PTT lines reach Jetson GPIO pins through only their pull-ups, while microphone lines reach U2 through coupling networks. There is no connector-boundary path for ESD current.
Correction
Add low-leakage, low-capacitance ESD protection for microphone and PTT lines at H1/H2. Select separate protection appropriate for the speaker and power pins, and provide a short return to the ground plane.
4. Low — H1/H2 pin functions are not clearly documented
H1 and H2 use generic numeric-pin symbols. Although pin 5 is marked no-connect, the remaining functions are not identified at the connector symbols.
Correction
Use named-pin connector symbols or add a visible table documenting: pin 1 GND, pin 2 speaker, pin 3 PTT, pin 4 microphone, pin 5 NC, and pin 6 protected +5 V.
5. Low — Generic passive electrical ratings are incomplete
Most generic capacitors omit voltage rating and dielectric, and most generic resistors omit tolerance and power rating. This prevents complete validation of effective capacitance, noise, and manufacturing suitability.
Correction
Assign voltage rating, dielectric, tolerance, package, and purchasable MPN where relevant before release. Prioritize the 10 µF, 47 µF, 100 µF, audio-path, and reference-decoupling capacitors.
Resolved and Verified Items
Codec-to-amplifier level matching
- R1 and R3 are now 68 kΩ.
- R29 and R30 are now 1 kΩ.
- Including the TDA2822D’s approximately 100 kΩ input resistance, the divider attenuation is about −36.9 dB.
- Combined with the TDA2822D’s 39 dB typical gain, net voltage gain is approximately +2.1 dB.
- A 1 Vrms ES8388 full-scale output therefore requests approximately 1.28 Vrms at the speaker output, corresponding to about 205 mW into 8 Ω before losses. This is a coherent level match for a 5 V single-ended handset output.
ES8388 VMID
- C7 = 0.1 µF is correct.
- C8 = 10 µF is connected in parallel.
- The ES8388 Revision 5.0 application circuit on PDF page 7 shows 0.1 µF + 4.7 µF. The 10 µF value is larger than the shown bulk value but is not classified as a fault.
ES8388 analog/output supply decoupling
- AVDD and HPVDD share the filtered
ADC_3V3rail. - C13 and C17 provide two 0.1 µF bypass capacitors.
- C14 and newly added C23 provide two 10 µF bulk capacitors.
- The required complement of two local 0.1 µF + 10 µF pairs is now present at schematic level.
Connectivity and signal path
- All 58 nets have at least two connections; no single-pin electrical net is present.
- All active-component power and ground pins are connected.
- Intentional unused pins are marked by 23 no-connect symbols.
- ES8388-to-Jetson I²S directions are electrically correct and explicitly labeled.
- I²S lines include 33 Ω series resistors.
- I²C SDA/SCL are connected correctly and pulled up to 3.3 V.
- CE/AD0 is low; the documented seven-bit ES8388 address is correctly shown as 0x10.
- Both OPA1678 channels have complete feedback, bias, and AC-coupling networks.
- OPA1678 input bias is approximately 2.5 V, within its valid common-mode range on a 5 V supply.
- TDA2822D speaker coupling capacitor polarity is correct: IC1 outputs connect to capacitor anodes and speaker nodes connect to cathodes.
- Both 4.7 Ω / 0.1 µF output networks are correctly placed on the load side of the 470 µF coupling capacitors.
- No LEDs are present, so LED current limiting is not applicable.
Recommended Fix Order
- Decide whether to change C2/C4 to the datasheet 100 µF polarized implementation.
- Replace the Raspberry Pi host symbol with a Jetson Orin Nano J12 symbol.
- Add H1/H2 ESD protection.
- Improve connector annotation and assign complete passive ratings.
After these corrections, rerun schematic review before beginning PCB placement.
Executive Summary
Confirmed Open Findings
1. Medium — TDA2822D inverting-input bypass capacitors differ from the characterized stereo circuit
2. Medium — Host connector symbol uses incorrect platform-specific pin names
3. Medium — H1/H2 external signal pins have no ESD clamps
4. Low — H1/H2 pin functions are not clearly documented
5. Low — Generic passive electrical ratings are incomplete
Resolved and Verified Items
Codec-to-amplifier level matching
ES8388 VMID
ES8388 analog/output supply decoupling
Connectivity and signal path
Recommended Fix Order
