Capacitor Wiring Issues

flux

A few things stand out.
  • C3 makes sense. TI’s datasheet for U1 explicitly wants a 100 nF supply bypass close to VCC/GND.
  • C1 and C2 look like extra bulk decoupling on 3.3 V. They are not inherently wrong, but they are probably more than the transceiver strictly needs. So these were likely added for supply cleanliness, not because the chip absolutely requires all three.
  • C4 is the important bus-side one. With R1 and R2, it looks like someone was trying to make split termination. That is a valid CAN technique.
The bigger concern is that the split termination looks wired incorrectly:
  • R1 goes from CANH to one side
  • R2 goes from CANL to the other side
  • C4 goes to the center pin of TERM
But TERM is a 2-way solder jumper, so C4 can connect to one side or the other, not to the true midpoint between R1 and R2. For proper split termination, the capacitor should go to the actual resistor midpoint. As drawn, that network is suspicious and may not behave as intended.
Other possible issues:
  • R3 is 10 Ω on the RS pin of U1. TI documents 10 kΩ to 100 kΩ for slope-control mode. With 10 Ω, RS is effectively hard-low, so you get high-speed mode, not real slope control. If the goal was EMI reduction, this is likely wrong.
  • C5 and C6 are 68 pF from CANH/CANL to GND. These are not the main capacitor TI calls out for the transceiver. They may have been added as EMI filtering, but they also add line loading and can hurt signal integrity on longer/faster CAN links.
  • The ERC warnings are only about branch-point artifacts, so they do not explain a functional CAN problem.
So in short:
  • C3: good and expected
  • C1 / C2: probably just extra supply decoupling
  • C4: probably intended for split termination, but the surrounding wiring via TERM looks questionable
  • C5 / C6: optional filtering, potentially harmful depending on bus conditions
If you want, I can next walk through the termination network and show exactly how I’d expect R1, R2, C4, and Vref to be connected.
Show correct termination
Review RS pin
Assess bus capacitors
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CAN_RX
MODE
CAN_RX
MODE
CAN_TX
CAN_RX
CAN_TX
CAN_TX
Vref
CAN_RX
CANH
C3
Capacitance
0.1uF
+3V3
R3
Resistance
10 Ω
+3V3
VCC1
C2
Capacitance
1uF
CAN_TX
+3V3
C1
Capacitance
10uF
+3V3
CANL
MCU
U1

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SN65HVD230 Reference Design

SN65HVD230 Reference Design thumbnail
This SN65HVD230DR-based reference design is a CAN bus transceiver circuit that facilitates robust data communication across the CAN network. The design incorporates a variety of capacitors and resistors to maintain signal quality, and it employs a NUP2105L for voltage protection. This circuit is ideally suited for applications that need reliable data communication in automotive or industrial settings. #referenceDesign #project #CANbus #interface #transceiverCircuit #SN65HVD230 #SN65HVD230DR #referenceDesign #reference-design #template #canbus #texas-instruments

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