# Goal

- Integrate a 3-bit DIP switch into the Portable Audio DSP project to select the Ultranet channel pair in hardware. The DIP switch setting will feed the PLD, which decodes the 3-bit code and routes the corresponding two audio channels to the DSP and DAC.

# Implementation plan

1. **DIP Switch Integration**

1. Place a 3-bit DIP switch footprint in the schematic.

2. Connect each DIP pole to dedicated PLD input pins with appropriate pull-up or pull-down resistors to ensure stable logic levels.

3. Optionally add RC debounce circuits for noise immunity.

2. **PLD Logic Setup**

1. Define the 3-bit truth table mapping (codes 0–7) to the eight possible channel pairs.

2. Modify the PLD symbol to expose the DIP switch input pins and document the channel pair associations as part of the design notes.

3. **Routing to Audio System**

1. Connect the PLD outputs corresponding to the selected channel pair to the I2S/TDM path leading to the DSP and DAC.

2. Ensure all routing remains on the safe (non-isolated) side of the barrier.

4. **Optional ESP32 Status Monitoring**

1. Route the DIP switch signals to the ESP32 GPIOs as status inputs, verifying that the 3.3V logic levels are met.

2. Label these nets clearly for documentation and testing purposes.

# Success criteria

- A 3-bit DIP switch is integrated and correctly feeds the PLD inputs with stable logic levels (enhanced by pull-ups/pull-downs and optional RC debounce).

- The PLD implements the defined truth table mapping the DIP switch bits (0–7) to eight channel pairs and routes the selected channels to the DSP/DAC.

- Optional routing to the ESP32 for status is completed and verified for 3.3 V compatibility.

- All changes are documented in the design notes, including DIP switch mapping and PLD interface details.