This project is a vehicle display subsystem (from a Tesla Roadster open-source design) intended to show how to optimize cost and supply-chain risk in a real, fairly complex mixed-signal + power PCB.
Purpose (what it’s trying to do)
- Provide a compute/control core for a display system using a microcontroller + external parallel memories.
- Interface out to a display panel/cable harness and supporting vehicle I/O.
- Generate multiple power rails from an automotive supply and drive peripherals like backlight and audio.
Core building blocks (what’s on the board)
1) Compute + memory subsystem
- Main MCU: U1
- Parallel NOR flash (boot/firmware storage): U4
- External SRAM (frame buffers / scratch): U5, U6, U8, U9
How they interact:
- The nets indicate a classic parallel memory bus (address lines, data lines, chip-enables, OE/WE, byte-lane controls) between U1 and the memories (e.g., U4, U5, U6, U8, U9).
- A small logic decoder helps expand chip-selects: U7
2) Display / external connectivity
- High-pin-count FFC/FPC to panel or subassembly: J3
- Additional headers/connectors for harness/debug/peripherals:
How they interact:
- The display-related net portals (LCD signals) imply U1 drives panel timing/data routed to J3.
- Many test points exist for bring-up and measurement (e.g., TP1, TP12, TP23).
3) Power conversion + protection (automotive-facing)
Switch-mode regulators/drivers present:
- Main buck regulator: U13
- Additional buck: U16
- Dual-rail/boost-sepic style supply generation: U17
- LED driver (likely backlight-related): U18
Protection / input conditioning:
- Resettable fuses: F1, F2
- TVS for surge/ESD: D18
How they interact:
- Power net portals show multiple rails (e.g., VDD/VCC/+12 variants) distributed to logic and peripherals. The DC/DC parts (U13, U16, U17) generate those rails; protection parts (F1, F2, D18) help survive vehicle transients.
4) Communications (vehicle network)
- CAN transceiver: U11
- CAN common-mode choke: L6
How they interact:
- U1 provides CAN TX/RX to U11; L6 conditions CANH/CANL for EMI robustness before leaving the PCB.
- Audio power amp: U20
- Quad op-amp: U19
- Dual op-amp: U10
- Digital potentiometers (calibration/trim/user controls): U2, U3
- Reset supervisor: U14
- User input button: S1
Implementation notes (design choices, trade-offs, optimizations)
Parallel external memory architecture
- Pros: High bandwidth, deterministic access (useful for display pipelines with big SRAM).
- Trade-offs: Many address/data/control lines increase routing complexity, layer count pressure, and EMI sensitivity. It also increases connector/pin-count needs.
Automotive power approach
- Multiple switchers (U13, U16, U17) suggest a “generate what you need” rail strategy, which is typical for mixed loads (digital + backlight + analog).
- Optimization lever (cost/supply): Consolidating rails or selecting higher-integration PMICs can reduce BOM line items, but may worsen EMI/thermal or constrain sequencing.
Supply-chain red flags already visible in the BOM
- Several key ICs show lifecycle risk (example: U4 is flagged obsolete at some distributors; U19 appears obsolete).
- This aligns with the project’s “cost optimization” theme: you’d typically replace these with available, pin-compatible (or near) alternatives and re-verify.
Layout + manufacturability snapshot (from PCB)
- Board size rule: 84.7 mm x 67.5 mm (from the Layout rules).
- Current DRC/implementation state indicates it’s not “production ready” yet:
- Airwires (unrouted nets): present (many)
- Overlapping copper shorts: present
- Floating copper: present
- ERC flags include:
- No-connect violation on U4 (NC pin connected)
- Missing power driven on U1 (VDDA_PLL not driven)
These issues are consistent with an educational/example project or an in-progress PCB rather than a finished layout.
Potential challenges + performance considerations
- Signal integrity / timing: Parallel memory + display timing signals can be sensitive to skew, ringing, and crosstalk; routing topology and return paths matter a lot.
- EMI/EMC: Automotive supply + switching regulators + long connectors can create conducted/radiated EMI issues; CAN also has strict EMC expectations (helped by L6).
- Thermals: Switchers (U13, U16, U17) and audio (U20) are typical hotspots.
- Reliability / transients: Proper protection (already present via D18, F1, F2) must be validated against the real vehicle environment.
Real-world applications
- Retrofit or OEM-like display controller modules
- Instrument clusters / infotainment subassemblies
- Any embedded HMI needing deterministic memory bandwidth and rugged power input
Areas for improvement / scalability / future enhancements
- Close out correctness first
- Fix the ERC items (NC pin connection on U4, undriven rail on U1).
- Resolve DRC shorts/airwires/floating copper before evaluating performance.
- Supply-chain hardening
- Prioritize replacements for parts with “Obsolete/EOL/NRND” signals such as U4 and U19.
- Replace “template no MPN” passives with sourced equivalents to eliminate the MPN review errors.
- Architecture scaling options
- If you need more graphics throughput or want fewer high-speed parallel nets: migrate toward a more integrated SoC/display pipeline (trade-off: software complexity, different power/EMI profile).
- If you need modularity: keep the compute+memory local and push panel-specific analog/backlight onto a separate mezzanine connected via J3.
If you want, tell me whether your focus is (A) making this manufacturable as-is or (B) doing a cost/supply-chain redesign, and I’ll outline the highest-impact next steps in that direction.