Yes — here is the cleaner connection list, written as actual signal paths.

And you’re right to call out R1: right now it has no connection in the current design state. Per the project-explanation rule, I should describe what is actually connected, and separately flag gaps like unconnected parts

This is the pulse path as it currently exists:

That matches the recommended style of explaining a design by explicit signal flow from input to output

The pulse input node is this point:

So the cleaner branch view is:

and from that same node:

and also:

These are on ground:

Also tied to ground are the unused gates on U1:

If you want the simplest readable version:

There is a likely issue with the current state: the unused sections of U1 have both inputs and outputs tied to GND. That is what the project currently shows, but I would want to review that before treating the design as final, because documenting actual state and separately flagging concerns is the correct way to present it

If you want, I can next give you: